Commit c8961407 authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Shawn Guo
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ARM: dts: imx6qdl-skov-cpu: configure ethernet reference clock parent 



On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent c812c91b

arch/arm/boot/dts/imx6qdl-skov-cpu.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -105,6 +105,7 @@ clk50m_phy: phy-clock { 
		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <50000000>;

		clock-output-names = "enet_ref_pad";

	};



	reg_3v3: regulator-3v3 {
@@ -232,13 +233,16 @@ adc: adc@0 { 
	};

};



&clks {

	clocks = <&clk50m_phy>;

	clock-names = "enet_ref_pad";

	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;

	assigned-clock-parents = <&clk50m_phy>;

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	clocks = <&clks IMX6QDL_CLK_ENET>,

		 <&clks IMX6QDL_CLK_ENET>,

		 <&clk50m_phy>;

	clock-names = "ipg", "ahb", "ptp";

	phy-mode = "rmii";

	phy-supply = <&reg_3v3>;

	status = "okay";