Unverified Commit 0cb7e0c6 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'qcom-arm64-for-6.10-2' of... 

Merge tag 'qcom-arm64-for-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

A few more Qualcomm Arm64 DeviceTree updates for v6.10

This corrects the obviously broken compatible of the USB VBUS regulator
in PM6150.

It clears the odd-looking default address on QCS404 EVB, with the
expectation that a proper address is provides by other means.

The newly added SM8650 GPU node is corrected with a missing memory
region.

The third DWC3 instance on SC8280XP is added, and enabled on Lenovo
Thinkpad X13s to give working fingerprint sensor.

* tag 'qcom-arm64-for-6.10-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: dts: qcom: pm6150: correct USB VBUS regulator compatible
  arm64: dts: qcom: qcs404: fix bluetooth device address
  arm64: dts: qcom: sc8280xp-x13s: enable USB MP and fingerprint reader
  arm64: dts: qcom: sc8280xp: Add USB DWC3 Multiport controller
  arm64: dts: qcom: sm8650: Fix GPU cx_mem size

Link: https://lore.kernel.org/r/20240508021820.206441-1-andersson@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents f89d2243 0ea3e1d6

arch/arm64/boot/dts/qcom/pm6150.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -64,8 +64,8 @@ pm6150_resin: resin { 
		};



		pm6150_vbus: usb-vbus-regulator@1100 {

			compatible = "qcom,pm6150-vbus-reg,

				      qcom,pm8150b-vbus-reg";

			compatible = "qcom,pm6150-vbus-reg",

				     "qcom,pm8150b-vbus-reg";

			reg = <0x1100>;

			status = "disabled";

		};

arch/arm64/boot/dts/qcom/qcs404-evb.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ bluetooth { 
		vddrf-supply = <&vreg_l1_1p3>;

		vddch0-supply = <&vdd_ch0_3p3>;



		local-bd-address = [ 02 00 00 00 5a ad ];

		local-bd-address = [ 00 00 00 00 00 00 ];



		max-speed = <3200000>;

	};

arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts

+85 −0
Original line number Diff line number Diff line
@@ -416,6 +416,13 @@ vreg_s12b: smps12 { 
			regulator-always-on;

		};



		vreg_l1b: ldo1 {

			regulator-name = "vreg_l1b";

			regulator-min-microvolt = <912000>;

			regulator-max-microvolt = <912000>;

			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};



		vreg_l3b: ldo3 {

			regulator-name = "vreg_l3b";

			regulator-min-microvolt = <1200000>;
@@ -466,6 +473,13 @@ vreg_l1c: ldo1 { 
			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};



		vreg_l8c: ldo8 {

			regulator-name = "vreg_l8c";

			regulator-min-microvolt = <1800000>;

			regulator-max-microvolt = <1800000>;

			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};



		vreg_l12c: ldo12 {

			regulator-name = "vreg_l12c";

			regulator-min-microvolt = <1800000>;
@@ -499,6 +513,13 @@ regulators-2 { 
		vdd-l6-l9-l10-supply = <&vreg_s12b>;

		vdd-l8-supply = <&vreg_s12b>;



		vreg_l2d: ldo2 {

			regulator-name = "vreg_l2d";

			regulator-min-microvolt = <3072000>;

			regulator-max-microvolt = <3072000>;

			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};



		vreg_l3d: ldo3 {

			regulator-name = "vreg_l3d";

			regulator-min-microvolt = <1200000>;
@@ -527,12 +548,26 @@ vreg_l7d: ldo7 { 
			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};



		vreg_l8d: ldo8 {

			regulator-name = "vreg_l8d";

			regulator-min-microvolt = <912000>;

			regulator-max-microvolt = <912000>;

			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};



		vreg_l9d: ldo9 {

			regulator-name = "vreg_l9d";

			regulator-min-microvolt = <912000>;

			regulator-max-microvolt = <912000>;

			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};



		vreg_l10d: ldo10 {

			regulator-name = "vreg_l10d";

			regulator-min-microvolt = <912000>;

			regulator-max-microvolt = <912000>;

			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;

		};

	};

};
@@ -1162,6 +1197,56 @@ &usb_1_role_switch { 
	remote-endpoint = <&pmic_glink_con1_hs>;

};



&usb_2 {

	status = "okay";

};



&usb_2_hsphy0 {

	vdda-pll-supply = <&vreg_l1b>;

	vdda18-supply = <&vreg_l1c>;

	vdda33-supply = <&vreg_l7d>;



	status = "okay";

};



&usb_2_hsphy1 {

	vdda-pll-supply = <&vreg_l8d>;

	vdda18-supply = <&vreg_l1c>;

	vdda33-supply = <&vreg_l7d>;



	status = "okay";

};



&usb_2_hsphy2 {

	vdda-pll-supply = <&vreg_l10d>;

	vdda18-supply = <&vreg_l8c>;

	vdda33-supply = <&vreg_l2d>;



	status = "okay";

};



&usb_2_hsphy3 {

	vdda-pll-supply = <&vreg_l10d>;

	vdda18-supply = <&vreg_l8c>;

	vdda33-supply = <&vreg_l2d>;



	status = "okay";

};



&usb_2_qmpphy0 {

	vdda-phy-supply = <&vreg_l1b>;

	vdda-pll-supply = <&vreg_l4d>;



	status = "okay";

};



&usb_2_qmpphy1 {

	vdda-phy-supply = <&vreg_l8d>;

	vdda-pll-supply = <&vreg_l4d>;



	status = "okay";

};



&vamacro {

	pinctrl-0 = <&dmic01_default>, <&dmic23_default>;

	pinctrl-names = "default";

arch/arm64/boot/dts/qcom/sc8280xp.dtsi

+82 −0
Original line number Diff line number Diff line
@@ -3423,6 +3423,88 @@ system-cache-controller@9200000 { 
			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;

		};



		usb_2: usb@a4f8800 {

			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";

			reg = <0 0x0a4f8800 0 0x400>;

			#address-cells = <2>;

			#size-cells = <2>;

			ranges;



			clocks = <&gcc GCC_CFG_NOC_USB3_MP_AXI_CLK>,

				 <&gcc GCC_USB30_MP_MASTER_CLK>,

				 <&gcc GCC_AGGRE_USB3_MP_AXI_CLK>,

				 <&gcc GCC_USB30_MP_SLEEP_CLK>,

				 <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,

				 <&gcc GCC_AGGRE_USB_NOC_AXI_CLK>,

				 <&gcc GCC_AGGRE_USB_NOC_NORTH_AXI_CLK>,

				 <&gcc GCC_AGGRE_USB_NOC_SOUTH_AXI_CLK>,

				 <&gcc GCC_SYS_NOC_USB_AXI_CLK>;

			clock-names = "cfg_noc", "core", "iface", "sleep", "mock_utmi",

				      "noc_aggr", "noc_aggr_north", "noc_aggr_south", "noc_sys";



			assigned-clocks = <&gcc GCC_USB30_MP_MOCK_UTMI_CLK>,

					  <&gcc GCC_USB30_MP_MASTER_CLK>;

			assigned-clock-rates = <19200000>, <200000000>;



			interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,

					      <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,

					      <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,

					      <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>,

					      <&intc GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,

					      <&intc GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,

					      <&intc GIC_SPI 860 IRQ_TYPE_LEVEL_HIGH>,

					      <&intc GIC_SPI 859 IRQ_TYPE_LEVEL_HIGH>,

					      <&pdc 127 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 126 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 129 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 128 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 131 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 130 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 133 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 132 IRQ_TYPE_EDGE_BOTH>,

					      <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,

					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>;



			interrupt-names = "pwr_event_1", "pwr_event_2",

					  "pwr_event_3", "pwr_event_4",

					  "hs_phy_1",	 "hs_phy_2",

					  "hs_phy_3",	 "hs_phy_4",

					  "dp_hs_phy_1", "dm_hs_phy_1",

					  "dp_hs_phy_2", "dm_hs_phy_2",

					  "dp_hs_phy_3", "dm_hs_phy_3",

					  "dp_hs_phy_4", "dm_hs_phy_4",

					  "ss_phy_1",	 "ss_phy_2";



			power-domains = <&gcc USB30_MP_GDSC>;

			required-opps = <&rpmhpd_opp_nom>;



			resets = <&gcc GCC_USB30_MP_BCR>;



			interconnects = <&aggre1_noc MASTER_USB3_MP 0 &mc_virt SLAVE_EBI1 0>,

					<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_USB3_MP 0>;

			interconnect-names = "usb-ddr", "apps-usb";



			wakeup-source;



			status = "disabled";



			usb_2_dwc3: usb@a400000 {

				compatible = "snps,dwc3";

				reg = <0 0x0a400000 0 0xcd00>;

				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;

				iommus = <&apps_smmu 0x800 0x0>;

				phys = <&usb_2_hsphy0>, <&usb_2_qmpphy0>,

				       <&usb_2_hsphy1>, <&usb_2_qmpphy1>,

				       <&usb_2_hsphy2>,

				       <&usb_2_hsphy3>;

				phy-names = "usb2-0", "usb3-0",

					    "usb2-1", "usb3-1",

					    "usb2-2",

					    "usb2-3";

				dr_mode = "host";

			};

		};



		usb_0: usb@a6f8800 {

			compatible = "qcom,sc8280xp-dwc3", "qcom,dwc3";

			reg = <0 0x0a6f8800 0 0x400>;

arch/arm64/boot/dts/qcom/sm8650.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -2614,7 +2614,7 @@ tcsr: clock-controller@1fc0000 { 
		gpu: gpu@3d00000 {

			compatible = "qcom,adreno-43051401", "qcom,adreno";

			reg = <0x0 0x03d00000 0x0 0x40000>,

			      <0x0 0x03d9e000 0x0 0x1000>,

			      <0x0 0x03d9e000 0x0 0x2000>,

			      <0x0 0x03d61000 0x0 0x800>;

			reg-names = "kgsl_3d0_reg_memory",

				    "cx_mem",