Commit 0dffcea4 authored by Karol Kolacinski's avatar Karol Kolacinski Committed by Tony Nguyen
Browse files

ice: add TSPLL log config helper



Add a helper function to print new/current TSPLL config. This helps
avoid unnecessary casts from u8 to enums.

Reviewed-by: default avatarMichal Kubiak <michal.kubiak@intel.com>
Reviewed-by: default avatarMilena Olech <milena.olech@intel.com>
Signed-off-by: default avatarKarol Kolacinski <karol.kolacinski@intel.com>
Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel)
Signed-off-by: default avatarTony Nguyen <anthony.l.nguyen@intel.com>
parent b3b26c98
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+30 −24
Original line number Diff line number Diff line
@@ -89,6 +89,26 @@ static const char *ice_tspll_clk_src_str(enum ice_clk_src clk_src)
	}
}

/**
 * ice_tspll_log_cfg - Log current/new TSPLL configuration
 * @hw: Pointer to the HW struct
 * @enable: CGU enabled/disabled
 * @clk_src: Current clock source
 * @tspll_freq: Current clock frequency
 * @lock: CGU lock status
 * @new_cfg: true if this is a new config
 */
static void ice_tspll_log_cfg(struct ice_hw *hw, bool enable, u8 clk_src,
			      u8 tspll_freq, bool lock, bool new_cfg)
{
	dev_dbg(ice_hw_to_dev(hw),
		"%s TSPLL configuration -- %s, src %s, freq %s, PLL %s\n",
		new_cfg ? "New" : "Current", str_enabled_disabled(enable),
		ice_tspll_clk_src_str((enum ice_clk_src)clk_src),
		ice_tspll_clk_freq_str((enum ice_tspll_freq)tspll_freq),
		lock ? "locked" : "unlocked");
}

/**
 * ice_tspll_cfg_e82x - Configure the Clock Generation Unit TSPLL
 * @hw: Pointer to the HW struct
@@ -144,12 +164,9 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
	if (err)
		return err;

	/* Log the current clock configuration */
	ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
		  str_enabled_disabled(dw24.ts_pll_enable),
		  ice_tspll_clk_src_str(dw24.time_ref_sel),
		  ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
		  bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");
	ice_tspll_log_cfg(hw, dw24.ts_pll_enable, dw24.time_ref_sel,
			  dw9.time_ref_freq_sel, bwm_lf.plllock_true_lock_cri,
			  false);

	/* Disable the PLL before changing the clock source or frequency */
	if (dw24.ts_pll_enable) {
@@ -222,12 +239,8 @@ static int ice_tspll_cfg_e82x(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
		return -EBUSY;
	}

	/* Log the current clock configuration */
	ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
		  str_enabled_disabled(dw24.ts_pll_enable),
		  ice_tspll_clk_src_str(dw24.time_ref_sel),
		  ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
		  bwm_lf.plllock_true_lock_cri ? "locked" : "unlocked");
	ice_tspll_log_cfg(hw, dw24.ts_pll_enable, clk_src, clk_freq, true,
			  true);

	return 0;
}
@@ -316,12 +329,9 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
	if (err)
		return err;

	/* Log the current clock configuration */
	ice_debug(hw, ICE_DBG_PTP, "Current TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
		  str_enabled_disabled(dw23.ts_pll_enable),
		  ice_tspll_clk_src_str(dw23.time_ref_sel),
		  ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
		  ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");
	ice_tspll_log_cfg(hw, dw23.ts_pll_enable, dw23.time_ref_sel,
			  dw9.time_ref_freq_sel,
			  ro_lock.plllock_true_lock_cri, false);

	/* Disable the PLL before changing the clock source or frequency */
	if (dw23.ts_pll_enable) {
@@ -414,12 +424,8 @@ static int ice_tspll_cfg_e825c(struct ice_hw *hw, enum ice_tspll_freq clk_freq,
		return -EBUSY;
	}

	/* Log the current clock configuration */
	ice_debug(hw, ICE_DBG_PTP, "New TSPLL configuration -- %s, clk_src %s, clk_freq %s, PLL %s\n",
		  str_enabled_disabled(dw23.ts_pll_enable),
		  ice_tspll_clk_src_str(dw23.time_ref_sel),
		  ice_tspll_clk_freq_str(dw9.time_ref_freq_sel),
		  ro_lock.plllock_true_lock_cri ? "locked" : "unlocked");
	ice_tspll_log_cfg(hw, dw23.ts_pll_enable, clk_src, clk_freq, true,
			  true);

	return 0;
}