Commit 0ee6a72b authored by Ben Skeggs's avatar Ben Skeggs Committed by Lyude Paul
Browse files

drm/nouveau/mmu/tu102: Add support for compressed kinds 



Allow compressed PTE kinds to be written into PTEs when GSP-RM is
present, rather than reverting to their non-compressed versions.

Signed-off-by: default avatarBen Skeggs <bskeggs@nvidia.com>
Signed-off-by: default avatarMohamed Ahmed <mohamedahmedegypt2001@gmail.com>
Signed-off-by: default avatarMary Guillemard <mary@mary.zone>
Reviewed-by: default avatarLyude Paul <lyude@redhat.com>
Reviewed-by: default avatarJames Jones <jajones@nvidia.com>
Signed-off-by: default avatarLyude Paul <lyude@redhat.com>
Link: https://patch.msgid.link/20251110-nouveau-compv6-v6-4-83b05475f57c@mary.zone
parent a79d3845

drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c

+44 −2
Original line number Diff line number Diff line
@@ -109,12 +109,34 @@ gp100_vmm_pgt_pfn(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, 
	nvkm_done(pt->memory);

}



static inline u64

gp100_vmm_comptag_nr(u64 size)

{

	return size >> 16; /* One comptag per 64KiB VRAM. */

}



static inline u64

gp100_vmm_pte_comptagline_base(u64 addr)

{

	/* RM allocates enough comptags for all of VRAM, so use a 1:1 mapping. */

	return (1 + gp100_vmm_comptag_nr(addr)) << 36; /* NV_MMU_VER2_PTE_COMPTAGLINE */

}



static inline u64

gp100_vmm_pte_comptagline_incr(u32 page_size)

{

	return gp100_vmm_comptag_nr(page_size) << 36; /* NV_MMU_VER2_PTE_COMPTAGLINE */

}



static inline void

gp100_vmm_pgt_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt,

		  u32 ptei, u32 ptes, struct nvkm_vmm_map *map, u64 addr)

{

	u64 data = (addr >> 4) | map->type;



	if (map->ctag)

		data |= gp100_vmm_pte_comptagline_base(addr);



	while (ptes--) {

		VMM_WO064(pt, vmm, ptei++ * 8, data);

		data += map->next;
@@ -195,6 +217,9 @@ gp100_vmm_pd0_pte(struct nvkm_vmm *vmm, struct nvkm_mmu_pt *pt, 
{

	u64 data = (addr >> 4) | map->type;



	if (map->ctag)

		data |= gp100_vmm_pte_comptagline_base(addr);



	while (ptes--) {

		VMM_WO128(pt, vmm, ptei++ * 0x10, data, 0ULL);

		data += map->next;
@@ -440,10 +465,27 @@ gp100_vmm_valid(struct nvkm_vmm *vmm, void *argv, u32 argc, 
		return -EINVAL;

	}



	/* Handle compression. */

	if (kindm[kind] != kind) {

		struct nvkm_device *device = vmm->mmu->subdev.device;



		/* Compression is only supported when using GSP-RM, as

		 * PMU firmware is required in order to initialise the

		 * compbit backing store.

		 */

		if (nvkm_gsp_rm(device->gsp)) {

			/* Turing GPUs require PTE_COMPTAGLINE to be filled,

			 * in addition to specifying a compressed kind.

			 */

			if (device->card_type < GA100) {

				map->ctag  = gp100_vmm_pte_comptagline_incr(1 << map->page->shift);

				map->next |= map->ctag;

			}

		} else {

			/* Revert to non-compressed kind. */

			kind = kindm[kind];

		}

	}



	map->type |= BIT(0);

	map->type |= (u64)aper << 1;