Commit 128795bd authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-fixes-6.15' of... 

Merge tag 'imx-fixes-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 6.15:

- An i.MX8MP change from Ahmad Fatoum to fix the broken nominal device
  tree caused by commit 9f7595b3 ("arm64: dts: imx8mp: configure
  GPU and NPU clocks to overdrive rate")
- A MAINTAINERS update from Michael Riesch to exclude Sony IMX image
  sensor drivers from i.MX entry
- A i.MX95 device tree change from Richard Zhu to correct the range of
  PCIe app-reg region
- An opos6ul device tree change from Sébastien Szymanski to fix
  an Ethernet regression caused by commit c7e73b50 ("ARM: imx:
  mach-imx6ul: remove 14x14 EVK specific PHY fixup")
- An imx8mm-verdin device tree change from Wojciech Dubowik to fix
  a SD card regression caused by commit f5aab043 ("regulator:
  pca9450: Fix enable register for LDO5")

* tag 'imx-fixes-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: imx8mm-verdin: Link reg_usdhc2_vqmmc to usdhc2
  MAINTAINERS: add exclude for dt-bindings to imx entry
  ARM: dts: opos6ul: add ksz8081 phy properties
  arm64: dts: imx95: Correct the range of PCIe app-reg region
  arm64: dts: imx8mp: configure GPU and NPU clocks in nominal DTSI
parents 7771f41d 5591ce00

MAINTAINERS

+1 −0
Original line number Diff line number Diff line
@@ -2519,6 +2519,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git 
F:	arch/arm/boot/dts/nxp/imx/

F:	arch/arm/boot/dts/nxp/mxs/

F:	arch/arm64/boot/dts/freescale/

X:	Documentation/devicetree/bindings/media/i2c/

X:	arch/arm64/boot/dts/freescale/fsl-*

X:	arch/arm64/boot/dts/freescale/qoriq-*

X:	drivers/media/i2c/

arch/arm/boot/dts/nxp/imx/imx6ul-imx6ull-opos6ul.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -40,6 +40,9 @@ ethphy1: ethernet-phy@1 { 
			reg = <1>;

			interrupt-parent = <&gpio4>;

			interrupts = <16 IRQ_TYPE_LEVEL_LOW>;

			micrel,led-mode = <1>;

			clocks = <&clks IMX6UL_CLK_ENET_REF>;

			clock-names = "rmii-ref";

			status = "okay";

		};

	};

arch/arm64/boot/dts/freescale/imx8mm-verdin.dtsi

+20 −5
Original line number Diff line number Diff line
@@ -144,6 +144,19 @@ reg_usdhc2_vmmc: regulator-usdhc2 { 
		startup-delay-us = <20000>;

	};



	reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {

		compatible = "regulator-gpio";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_usdhc2_vsel>;

		gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;

		regulator-max-microvolt = <3300000>;

		regulator-min-microvolt = <1800000>;

		states = <1800000 0x1>,

			 <3300000 0x0>;

		regulator-name = "PMIC_USDHC_VSELECT";

		vin-supply = <&reg_nvcc_sd>;

	};



	reserved-memory {

		#address-cells = <2>;

		#size-cells = <2>;
@@ -269,7 +282,7 @@ &gpio1 { 
			  "SODIMM_19",

			  "",

			  "",

			  "",

			  "PMIC_USDHC_VSELECT",

			  "",

			  "",

			  "",
@@ -785,6 +798,7 @@ &usdhc2 { 
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;

	pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd_sleep>;

	vmmc-supply = <&reg_usdhc2_vmmc>;

	vqmmc-supply = <&reg_usdhc2_vqmmc>;

};



&wdog1 {
@@ -1206,13 +1220,17 @@ pinctrl_usdhc2_pwr_en: usdhc2pwrengrp { 
			<MX8MM_IOMUXC_NAND_CLE_GPIO3_IO5		0x6>;	/* SODIMM 76 */

	};



	pinctrl_usdhc2_vsel: usdhc2vselgrp {

		fsl,pins =

			<MX8MM_IOMUXC_GPIO1_IO04_GPIO1_IO4	0x10>; /* PMIC_USDHC_VSELECT */

	};



	/*

	 * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the

	 * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.

	 */

	pinctrl_usdhc2: usdhc2grp {

		fsl,pins =

			<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10>,

			<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x90>,	/* SODIMM 78 */

			<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x90>,	/* SODIMM 74 */

			<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x90>,	/* SODIMM 80 */
@@ -1223,7 +1241,6 @@ pinctrl_usdhc2: usdhc2grp { 


	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {

		fsl,pins =

			<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10>,

			<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x94>,

			<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x94>,

			<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x94>,
@@ -1234,7 +1251,6 @@ pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 


	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {

		fsl,pins =

			<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x10>,

			<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x96>,

			<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x96>,

			<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x96>,
@@ -1246,7 +1262,6 @@ pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 
	/* Avoid backfeeding with removed card power */

	pinctrl_usdhc2_sleep: usdhc2slpgrp {

		fsl,pins =

			<MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT		0x0>,

			<MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK		0x0>,

			<MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD		0x0>,

			<MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0		0x0>,

arch/arm64/boot/dts/freescale/imx8mp-nominal.dtsi

+26 −0
Original line number Diff line number Diff line
@@ -24,6 +24,20 @@ &clk { 
	fsl,operating-mode = "nominal";

};



&gpu2d {

	assigned-clocks = <&clk IMX8MP_CLK_GPU2D_CORE>;

	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>;

	assigned-clock-rates = <800000000>;

};



&gpu3d {

	assigned-clocks = <&clk IMX8MP_CLK_GPU3D_CORE>,

			  <&clk IMX8MP_CLK_GPU3D_SHADER_CORE>;

	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,

				 <&clk IMX8MP_SYS_PLL1_800M>;

	assigned-clock-rates = <800000000>, <800000000>;

};



&pgc_hdmimix {

	assigned-clocks = <&clk IMX8MP_CLK_HDMI_AXI>,

			  <&clk IMX8MP_CLK_HDMI_APB>;
@@ -46,6 +60,18 @@ &pgc_gpumix { 
	assigned-clock-rates = <600000000>, <300000000>;

};



&pgc_mlmix {

	assigned-clocks = <&clk IMX8MP_CLK_ML_CORE>,

			  <&clk IMX8MP_CLK_ML_AXI>,

			  <&clk IMX8MP_CLK_ML_AHB>;

	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,

				 <&clk IMX8MP_SYS_PLL1_800M>,

				 <&clk IMX8MP_SYS_PLL1_800M>;

	assigned-clock-rates = <800000000>,

			       <800000000>,

			       <300000000>;

};



&media_blk_ctrl {

	assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>,

			  <&clk IMX8MP_CLK_MEDIA_APB>,

arch/arm64/boot/dts/freescale/imx95.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -1626,7 +1626,7 @@ pcie0: pcie@4c300000 { 
			reg = <0 0x4c300000 0 0x10000>,

			      <0 0x60100000 0 0xfe00000>,

			      <0 0x4c360000 0 0x10000>,

			      <0 0x4c340000 0 0x2000>;

			      <0 0x4c340000 0 0x4000>;

			reg-names = "dbi", "config", "atu", "app";

			ranges = <0x81000000 0x0 0x00000000 0x0 0x6ff00000 0 0x00100000>,

				 <0x82000000 0x0 0x10000000 0x9 0x10000000 0 0x10000000>;
@@ -1673,7 +1673,7 @@ pcie0_ep: pcie-ep@4c300000 { 
			reg = <0 0x4c300000 0 0x10000>,

			      <0 0x4c360000 0 0x1000>,

			      <0 0x4c320000 0 0x1000>,

			      <0 0x4c340000 0 0x2000>,

			      <0 0x4c340000 0 0x4000>,

			      <0 0x4c370000 0 0x10000>,

			      <0x9 0 1 0>;

			reg-names = "dbi","atu", "dbi2", "app", "dma", "addr_space";
@@ -1700,7 +1700,7 @@ pcie1: pcie@4c380000 { 
			reg = <0 0x4c380000 0 0x10000>,

			      <8 0x80100000 0 0xfe00000>,

			      <0 0x4c3e0000 0 0x10000>,

			      <0 0x4c3c0000 0 0x2000>;

			      <0 0x4c3c0000 0 0x4000>;

			reg-names = "dbi", "config", "atu", "app";

			ranges = <0x81000000 0 0x00000000 0x8 0x8ff00000 0 0x00100000>,

				 <0x82000000 0 0x10000000 0xa 0x10000000 0 0x10000000>;
@@ -1749,7 +1749,7 @@ pcie1_ep: pcie-ep@4c380000 { 
			reg = <0 0x4c380000 0 0x10000>,

			      <0 0x4c3e0000 0 0x1000>,

			      <0 0x4c3a0000 0 0x1000>,

			      <0 0x4c3c0000 0 0x2000>,

			      <0 0x4c3c0000 0 0x4000>,

			      <0 0x4c3f0000 0 0x10000>,

			      <0xa 0 1 0>;

			reg-names = "dbi", "atu", "dbi2", "app", "dma", "addr_space";