Commit 12b8a672 authored by Maulik Shah's avatar Maulik Shah Committed by Linus Walleij
Browse files

pinctrl: qcom: Fix PINGROUP definition for sm8750 



On newer SoCs intr_target_bit position is at 8 instead of 5. Fix it.

Also add missing intr_wakeup_present_bit and intr_wakeup_enable_bit which
enables forwarding of GPIO interrupts to parent PDC interrupt controller.

Fixes: afe9803e ("pinctrl: qcom: Add sm8750 pinctrl driver")
Signed-off-by: default avatarMaulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: default avatarAbel Vesa <abel.vesa@linaro.org>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: default avatarMelody Olvera <melody.olvera@oss.qualcomm.com>
Link: https://lore.kernel.org/20250429-pinctrl_sm8750-v2-1-87d45dd3bd82@oss.qualcomm.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 446d2858

drivers/pinctrl/qcom/pinctrl-sm8750.c

+3 −1
Original line number Diff line number Diff line
@@ -46,7 +46,9 @@ 
		.out_bit = 1,                                         \

		.intr_enable_bit = 0,                                 \

		.intr_status_bit = 0,                                 \

		.intr_target_bit = 5,                                 \

		.intr_wakeup_present_bit = 6,                         \

		.intr_wakeup_enable_bit = 7,                          \

		.intr_target_bit = 8,                                 \

		.intr_target_kpss_val = 3,                            \

		.intr_raw_status_bit = 4,                             \

		.intr_polarity_bit = 1,                               \