Commit 1576978f authored by Bhawanpreet Lakha's avatar Bhawanpreet Lakha Committed by Alex Deucher
Browse files

drm/amd/display: Allow Z8 when stutter threshold is not met for dcn35 



[Why&How]
Some panels don't meet the stutter threshold (4k etc), this leads to
power regressions. Allow z8 for panels that don't meet the threshold
but support PSR/replay

Reviewed-by: default avatarNicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Acked-by: default avatarTom Chung <chiahsuan.chung@amd.com>
Signed-off-by: default avatarBhawanpreet Lakha <bhawanpreet.lakha@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e9a09a19

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

+1 −1
Original line number Diff line number Diff line
@@ -603,7 +603,7 @@ void dcn35_decide_zstate_support(struct dc *dc, struct dc_state *context) 
		if (is_pwrseq0 && allow_z10)

			support = DCN_ZSTATE_SUPPORT_ALLOW;

		else if (is_pwrseq0 && (is_psr || is_replay))

			support = allow_z8 ? DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY : DCN_ZSTATE_SUPPORT_ALLOW_Z10_ONLY;

			support = DCN_ZSTATE_SUPPORT_ALLOW_Z8_Z10_ONLY;

		else if (allow_z8)

			support = DCN_ZSTATE_SUPPORT_ALLOW_Z8_ONLY;

drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c

+9 −0
Original line number Diff line number Diff line
@@ -570,6 +570,7 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s 
	struct dml2_dcn_clocks out_clks;

	unsigned int result = 0;

	bool need_recalculation = false;

	uint32_t cstate_enter_plus_exit_z8_ns;



	if (!context || context->stream_count == 0)

		return true;
@@ -641,6 +642,14 @@ static bool dml2_validate_and_build_resource(const struct dc *in_dc, struct dc_s 
		dml2_extract_watermark_set(&context->bw_ctx.bw.dcn.watermarks.d, &dml2->v20.dml_core_ctx);

		//copy for deciding zstate use

		context->bw_ctx.dml.vba.StutterPeriod = context->bw_ctx.dml2->v20.dml_core_ctx.mp.StutterPeriod;



		cstate_enter_plus_exit_z8_ns = context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns;



		if (context->bw_ctx.dml.vba.StutterPeriod < in_dc->debug.minimum_z8_residency_time &&

				cstate_enter_plus_exit_z8_ns < in_dc->debug.minimum_z8_residency_time * 1000)

			cstate_enter_plus_exit_z8_ns = in_dc->debug.minimum_z8_residency_time * 1000;



		context->bw_ctx.bw.dcn.watermarks.a.cstate_pstate.cstate_enter_plus_exit_z8_ns = cstate_enter_plus_exit_z8_ns;

	}



	return result;