Commit 15b6b243 authored by Niklas Cassel's avatar Niklas Cassel Committed by Manivannan Sadhasivam
Browse files

PCI: qcom: Wait PCIE_RESET_CONFIG_WAIT_MS after link-up IRQ



Per PCIe r6.0, sec 6.6.1, software must generally wait a minimum of
100ms (PCIE_RESET_CONFIG_WAIT_MS) after Link training completes before
sending a Configuration Request.

Prior to 36971d6c ("PCI: qcom: Don't wait for link if we can detect
Link Up"), qcom used dw_pcie_wait_for_link(), which waited between 0
and 90ms after the link came up before we enumerate the bus, and this
was apparently enough for most devices.

After 36971d6c, qcom_pcie_global_irq_thread() started enumeration
immediately when handling the link-up IRQ, and devices (e.g., Laszlo
Fiat's PLEXTOR PX-256M8PeGN NVMe SSD) may not be ready to handle config
requests yet.

Delay PCIE_RESET_CONFIG_WAIT_MS after the link-up IRQ before starting
enumeration.

Fixes: 82a82383 ("PCI: qcom: Add Qualcomm PCIe controller driver")
Signed-off-by: default avatarNiklas Cassel <cassel@kernel.org>
Signed-off-by: default avatarManivannan Sadhasivam <mani@kernel.org>
Reviewed-by: default avatarDamien Le Moal <dlemoal@kernel.org>
Reviewed-by: default avatarWilfred Mallawa <wilfred.mallawa@wdc.com>
Link: https://patch.msgid.link/20250625102347.1205584-13-cassel@kernel.org
parent c7eb9c5e
Loading
Loading
Loading
Loading
+1 −0
Original line number Diff line number Diff line
@@ -1564,6 +1564,7 @@ static irqreturn_t qcom_pcie_global_irq_thread(int irq, void *data)
	writel_relaxed(status, pcie->parf + PARF_INT_ALL_CLEAR);

	if (FIELD_GET(PARF_INT_ALL_LINK_UP, status)) {
		msleep(PCIE_RESET_CONFIG_WAIT_MS);
		dev_dbg(dev, "Received Link up event. Starting enumeration!\n");
		/* Rescan the bus to enumerate endpoint devices */
		pci_lock_rescan_remove();