Commit 1803bdfb authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amd/pm: Use emit_clock_levels in SMUv8.0 



Move to emit_clock_levels from print_clock_levels

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 723c504b

drivers/gpu/drm/amd/pm/powerplay/hwmgr/smu8_hwmgr.c

+18 −11
Original line number Diff line number Diff line
@@ -1564,14 +1564,15 @@ static int smu8_force_clock_level(struct pp_hwmgr *hwmgr, 
	return 0;

}



static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr,

		enum pp_clock_type type, char *buf)

static int smu8_emit_clock_levels(struct pp_hwmgr *hwmgr,

				  enum pp_clock_type type, char *buf,

				  int *offset)

{

	struct smu8_hwmgr *data = hwmgr->backend;

	struct phm_clock_voltage_dependency_table *sclk_table =

			hwmgr->dyn_state.vddc_dependency_on_sclk;

	uint32_t i, now;

	int size = 0;

	int size = *offset;



	switch (type) {

	case PP_SCLK:
@@ -1582,8 +1583,8 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr, 
				CURR_SCLK_INDEX);



		for (i = 0; i < sclk_table->count; i++)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

					i, sclk_table->entries[i].clk / 100,

			size += sysfs_emit_at(buf, size, "%d: %uMhz %s\n", i,

					      sclk_table->entries[i].clk / 100,

					      (i == now) ? "*" : "");

		break;

	case PP_MCLK:
@@ -1594,14 +1595,20 @@ static int smu8_print_clock_levels(struct pp_hwmgr *hwmgr, 
				CURR_MCLK_INDEX);



		for (i = SMU8_NUM_NBPMEMORYCLOCK; i > 0; i--)

			size += sprintf(buf + size, "%d: %uMhz %s\n",

					SMU8_NUM_NBPMEMORYCLOCK-i, data->sys_info.nbp_memory_clock[i-1] / 100,

					(SMU8_NUM_NBPMEMORYCLOCK-i == now) ? "*" : "");

			size += sysfs_emit_at(

				buf, size, "%d: %uMhz %s\n",

				SMU8_NUM_NBPMEMORYCLOCK - i,

				data->sys_info.nbp_memory_clock[i - 1] / 100,

				(SMU8_NUM_NBPMEMORYCLOCK - i == now) ? "*" :

								       "");

		break;

	default:

		break;

	}

	return size;



	*offset = size;



	return 0;

}



static int smu8_get_performance_level(struct pp_hwmgr *hwmgr, const struct pp_hw_power_state *state,
@@ -2055,7 +2062,7 @@ static const struct pp_hwmgr_func smu8_hwmgr_funcs = { 
	.set_cpu_power_state = smu8_set_cpu_power_state,

	.store_cc6_data = smu8_store_cc6_data,

	.force_clock_level = smu8_force_clock_level,

	.print_clock_levels = smu8_print_clock_levels,

	.emit_clock_levels = smu8_emit_clock_levels,

	.get_dal_power_level = smu8_get_dal_power_level,

	.get_performance_level = smu8_get_performance_level,

	.get_current_shallow_sleep_clocks = smu8_get_current_shallow_sleep_clocks,