Commit 196dacf4 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull dmaengine updates from Vinod Koul:
 "Core:

   - Managed API for dma channel request

  New support:

   - Sophgo CV18XX/SG200X dmamux driver

   - Qualcomm Milos GPI, sc8280xp GPI support

  Updates:

   - Conversion of brcm,iproc-sba and marvell,orion-xor binding

   - Unused code cleanup across drivers"

* tag 'dmaengine-6.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (23 commits)
  dt-bindings: dma: fsl-mxs-dma: allow interrupt-names for fsl,imx23-dma-apbx
  dmaengine: xdmac: make it selectable for ARCH_MICROCHIP
  dt-bindings: dma: Convert marvell,orion-xor to DT schema
  dt-bindings: dma: Convert brcm,iproc-sba to DT schema
  dmaengine: nbpfaxi: Add missing check after DMA map
  dmaengine: mv_xor: Fix missing check after DMA map and missing unmap
  dt-bindings: dma: qcom,gpi: document the Milos GPI DMA Engine
  dmaengine: idxd: Remove __packed from structures
  dmaengine: ti: Do not enable by default during compile testing
  dmaengine: sh: Do not enable SH_DMAE_BASE by default during compile testing
  dmaengine: idxd: Fix warning for deadcode.deadstore
  dmaengine: mmp: Fix again Wvoid-pointer-to-enum-cast warning
  dmaengine: fsl-qdma: Add missing fsl_qdma_format kerneldoc
  dmaengine: qcom: gpi: Drop unused gpi_write_reg_field()
  dmaengine: fsl-dpaa2-qdma: Drop unused mc_enc()
  dmaengine: dw-edma: Drop unused dchan2dev() and chan2dev()
  dmaengine: stm32: Don't use %pK through printk
  dmaengine: stm32-dma: configure next sg only if there are more than 2 sgs
  dmaengine: sun4i: Simplify error handling in probe()
  dt-bindings: dma: qcom,gpi: Document the sc8280xp GPI DMA engine
  ...
parents 8582976a e3a9ccd2
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* Broadcom SBA RAID engine

Required properties:
- compatible: Should be one of the following
	      "brcm,iproc-sba"
	      "brcm,iproc-sba-v2"
  The "brcm,iproc-sba" has support for only 6 PQ coefficients
  The "brcm,iproc-sba-v2" has support for only 30 PQ coefficients
- mboxes: List of phandle and mailbox channel specifiers

Example:

raid_mbox: mbox@67400000 {
	...
	#mbox-cells = <3>;
	...
};

raid0 {
	compatible = "brcm,iproc-sba-v2";
	mboxes = <&raid_mbox 0 0x1 0xffff>,
		 <&raid_mbox 1 0x1 0xffff>,
		 <&raid_mbox 2 0x1 0xffff>,
		 <&raid_mbox 3 0x1 0xffff>,
		 <&raid_mbox 4 0x1 0xffff>,
		 <&raid_mbox 5 0x1 0xffff>,
		 <&raid_mbox 6 0x1 0xffff>,
		 <&raid_mbox 7 0x1 0xffff>;
};
+41 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/brcm,iproc-sba.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Broadcom SBA RAID engine

maintainers:
  - Ray Jui <rjui@broadcom.com>
  - Scott Branden <sbranden@broadcom.com>

properties:
  compatible:
    enum:
      - brcm,iproc-sba
      - brcm,iproc-sba-v2

  mboxes:
    minItems: 1
    maxItems: 8

required:
  - compatible
  - mboxes

additionalProperties: false

examples:
  - |
    raid0 {
      compatible = "brcm,iproc-sba-v2";
      mboxes = <&raid_mbox 0 0x1 0xffff>,
               <&raid_mbox 1 0x1 0xffff>,
               <&raid_mbox 2 0x1 0xffff>,
               <&raid_mbox 3 0x1 0xffff>,
               <&raid_mbox 4 0x1 0xffff>,
               <&raid_mbox 5 0x1 0xffff>,
               <&raid_mbox 6 0x1 0xffff>,
               <&raid_mbox 7 0x1 0xffff>;
    };
+33 −0
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@@ -23,6 +23,35 @@ allOf:
      properties:
        power-domains: false

  - if:
      properties:
        compatible:
          contains:
            const: fsl,imx23-dma-apbx
    then:
      properties:
        interrupt-names:
          items:
            - const: audio-adc
            - const: audio-dac
            - const: spdif-tx
            - const: i2c
            - const: saif0
            - const: empty0
            - const: auart0-rx
            - const: auart0-tx
            - const: auart1-rx
            - const: auart1-tx
            - const: saif1
            - const: empty1
            - const: empty2
            - const: empty3
            - const: empty4
            - const: empty5
    else:
      properties:
        interrupt-names: false

properties:
  compatible:
    oneOf:
@@ -54,6 +83,10 @@ properties:
    minItems: 4
    maxItems: 16

  interrupt-names:
    minItems: 4
    maxItems: 16

  "#dma-cells":
    const: 1

+84 −0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/marvell,orion-xor.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Marvell XOR engine

maintainers:
  - Andrew Lunn <andrew@lunn.ch>
  - Gregory Clement <gregory.clement@bootlin.com>

properties:
  compatible:
    oneOf:
      - items:
          - const: marvell,armada-380-xor
          - const: marvell,orion-xor
      - enum:
          - marvell,armada-3700-xor
          - marvell,orion-xor

  reg:
    items:
      - description: Low registers for the XOR engine
      - description: High registers for the XOR engine

  clocks:
    maxItems: 1

patternProperties:
  "^(channel|xor)[0-9]+$":
    description: XOR channel sub-node
    type: object
    additionalProperties: false

    properties:
      interrupts:
        description: Interrupt specifier for the XOR channel
        items:
          - description: Interrupt for this channel

      dmacap,memcpy:
        type: boolean
        deprecated: true
        description:
          Indicates that the XOR channel is capable of memcpy operations

      dmacap,memset:
        type: boolean
        deprecated: true
        description:
          Indicates that the XOR channel is capable of memset operations

      dmacap,xor:
        type: boolean
        deprecated: true
        description:
          Indicates that the XOR channel is capable of xor operations

    required:
      - interrupts

required:
  - compatible
  - reg

additionalProperties: false

examples:
  - |
    xor@d0060900 {
        compatible = "marvell,orion-xor";
        reg = <0xd0060900 0x100>,
              <0xd0060b00 0x100>;
        clocks = <&coreclk 0>;

        xor00 {
            interrupts = <51>;
        };
        xor01 {
            interrupts = <52>;
        };
    };
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* Marvell XOR engines

Required properties:
- compatible: Should be one of the following:
  - "marvell,orion-xor"
  - "marvell,armada-380-xor"
  - "marvell,armada-3700-xor".
- reg: Should contain registers location and length (two sets)
    the first set is the low registers, the second set the high
    registers for the XOR engine.
- clocks: pointer to the reference clock

The DT node must also contains sub-nodes for each XOR channel that the
XOR engine has. Those sub-nodes have the following required
properties:
- interrupts: interrupt of the XOR channel

The sub-nodes used to contain one or several of the following
properties, but they are now deprecated:
- dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
- dmacap,memset to indicate that the XOR channel is capable of memset operations
- dmacap,xor to indicate that the XOR channel is capable of xor operations
- dmacap,interrupt to indicate that the XOR channel is capable of
  generating interrupts

Example:

xor@d0060900 {
	compatible = "marvell,orion-xor";
	reg = <0xd0060900 0x100
	       0xd0060b00 0x100>;
	clocks = <&coreclk 0>;

	xor00 {
	      interrupts = <51>;
	};
	xor01 {
	      interrupts = <52>;
	};
};
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