Commit 1c97ea11 authored by Dharma Balasubiramani's avatar Dharma Balasubiramani Committed by Ulf Hansson
Browse files

dt-bindings: mmc: sdhci-atmel: Convert to json schema 



Convert sdhci-atmel documentation to yaml format. The new file will inherit
from sdhci-common.yaml.

Note: Add microchip,sama7g5-sdhci to compatible list as we already use it
in the DT.

Signed-off-by: default avatarDharma Balasubiramani <dharma.b@microchip.com>
Reviewed-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240902-atmel-sdhci-v4-1-96912fab6b2d@microchip.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 6f25e5de

Documentation/devicetree/bindings/mmc/atmel,sama5d2-sdhci.yaml

0 → 100644
+92 −0
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/mmc/atmel,sama5d2-sdhci.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Atmel SDHCI controller



maintainers:

  - Aubin Constans <aubin.constans@microchip.com>

  - Nicolas Ferre <nicolas.ferre@microchip.com>



description:

  Bindings for the SDHCI controller found in Atmel/Microchip SoCs.



properties:

  compatible:

    oneOf:

      - enum:

          - atmel,sama5d2-sdhci

          - microchip,sam9x60-sdhci

      - items:

          - enum:

              - microchip,sam9x7-sdhci

              - microchip,sama7g5-sdhci

          - const: microchip,sam9x60-sdhci



  reg:

    maxItems: 1



  interrupts:

    maxItems: 1



  clocks:

    items:

      - description: hclock

      - description: multclk

      - description: baseclk

    minItems: 2



  clock-names:

    items:

      - const: hclock

      - const: multclk

      - const: baseclk

    minItems: 2



  microchip,sdcal-inverted:

    type: boolean

    description:

      When present, polarity on the SDCAL SoC pin is inverted. The default

      polarity for this signal is described in the datasheet. For instance on

      SAMA5D2, the pin is usually tied to the GND with a resistor and a

      capacitor (see "SDMMC I/O Calibration" chapter).



required:

  - compatible

  - reg

  - interrupts

  - clocks

  - clock-names



allOf:

  - $ref: sdhci-common.yaml#

  - if:

      properties:

        compatible:

          contains:

            enum:

              - atmel,sama5d2-sdhci

    then:

      properties:

        clocks:

          minItems: 3

        clock-names:

          minItems: 3



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/irq.h>

    #include <dt-bindings/clock/at91.h>

    mmc@a0000000 {

        compatible = "atmel,sama5d2-sdhci";

        reg = <0xa0000000 0x300>;

        interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;

        clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;

        clock-names = "hclock", "multclk", "baseclk";

        assigned-clocks = <&sdmmc0_gclk>;

        assigned-clock-rates = <480000000>;

    };

Documentation/devicetree/bindings/mmc/sdhci-atmel.txt

deleted100644 → 0
+0 −35
Original line number Diff line number Diff line 
* Atmel SDHCI controller



This file documents the differences between the core properties in

Documentation/devicetree/bindings/mmc/mmc.txt and the properties used by the

sdhci-of-at91 driver.



Required properties:

- compatible:		Must be "atmel,sama5d2-sdhci" or "microchip,sam9x60-sdhci"

			or "microchip,sam9x7-sdhci", "microchip,sam9x60-sdhci".

- clocks:		Phandlers to the clocks.

- clock-names:		Must be "hclock", "multclk", "baseclk" for

			"atmel,sama5d2-sdhci".

			Must be "hclock", "multclk" for "microchip,sam9x60-sdhci".

			Must be "hclock", "multclk" for "microchip,sam9x7-sdhci".



Optional properties:

- assigned-clocks:	The same with "multclk".

- assigned-clock-rates	The rate of "multclk" in order to not rely on the

			gck configuration set by previous components.

- microchip,sdcal-inverted: when present, polarity on the SDCAL SoC pin is

  inverted. The default polarity for this signal is described in the datasheet.

  For instance on SAMA5D2, the pin is usually tied to the GND with a resistor

  and a capacitor (see "SDMMC I/O Calibration" chapter).



Example:



mmc0: sdio-host@a0000000 {

	compatible = "atmel,sama5d2-sdhci";

	reg = <0xa0000000 0x300>;

	interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;

	clocks = <&sdmmc0_hclk>, <&sdmmc0_gclk>, <&main>;

	clock-names = "hclock", "multclk", "baseclk";

	assigned-clocks = <&sdmmc0_gclk>;

	assigned-clock-rates = <480000000>;

};