Commit 1cebd7f7 authored by Namhyung Kim's avatar Namhyung Kim
Browse files

tools/include: Sync arm64 asm/cputype.h with the kernel sources 



To pick up the changes from:

  fb091ff3 ("arm64: Subscribe Microsoft Azure Cobalt 100 to ARM Neoverse N2 errata")

This should address these tools/perf build warnings:

  Warning: Kernel ABI header differences:
    diff -u tools/arch/arm64/include/asm/cputype.h arch/arm64/include/asm/cputype.h

Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: default avatarNamhyung Kim <namhyung@kernel.org>
Link: https://lore.kernel.org/r/20240408185520.1550865-10-namhyung@kernel.org
parent 99e4e117

tools/arch/arm64/include/asm/cputype.h

+4 −0
Original line number Diff line number Diff line
@@ -61,6 +61,7 @@ 
#define ARM_CPU_IMP_HISI		0x48

#define ARM_CPU_IMP_APPLE		0x61

#define ARM_CPU_IMP_AMPERE		0xC0

#define ARM_CPU_IMP_MICROSOFT		0x6D



#define ARM_CPU_PART_AEM_V8		0xD0F

#define ARM_CPU_PART_FOUNDATION		0xD00
@@ -135,6 +136,8 @@ 


#define AMPERE_CPU_PART_AMPERE1		0xAC3



#define MICROSOFT_CPU_PART_AZURE_COBALT_100	0xD49 /* Based on r0p0 of ARM Neoverse N2 */



#define MIDR_CORTEX_A53 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A53)

#define MIDR_CORTEX_A57 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A57)

#define MIDR_CORTEX_A72 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A72)
@@ -193,6 +196,7 @@ 
#define MIDR_APPLE_M2_BLIZZARD_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_BLIZZARD_MAX)

#define MIDR_APPLE_M2_AVALANCHE_MAX MIDR_CPU_MODEL(ARM_CPU_IMP_APPLE, APPLE_CPU_PART_M2_AVALANCHE_MAX)

#define MIDR_AMPERE1 MIDR_CPU_MODEL(ARM_CPU_IMP_AMPERE, AMPERE_CPU_PART_AMPERE1)

#define MIDR_MICROSOFT_AZURE_COBALT_100 MIDR_CPU_MODEL(ARM_CPU_IMP_MICROSOFT, MICROSOFT_CPU_PART_AZURE_COBALT_100)



/* Fujitsu Erratum 010001 affects A64FX 1.0 and 1.1, (v0r0 and v1r0) */

#define MIDR_FUJITSU_ERRATUM_010001		MIDR_FUJITSU_A64FX