Commit 1f5ed3ae authored by Kuninori Morimoto's avatar Kuninori Morimoto Committed by Geert Uytterhoeven
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clk: renesas: r8a779h0: Add Audio clocks 



Add module clocks for the Audio (SSI/SSIU) blocks on the Renesas R-Car
V4M (R8A779H0) SoC.

Signed-off-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/87h6djkxf2.wl-kuninori.morimoto.gx@renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent c8bd9bd6

drivers/clk/renesas/r8a779h0-cpg-mssr.c

+2 −0
Original line number Diff line number Diff line
@@ -233,6 +233,8 @@ static const struct mssr_mod_clk r8a779h0_mod_clks[] = { 
	DEF_MOD("pfc1",		916,	R8A779H0_CLK_CP),

	DEF_MOD("pfc2",		917,	R8A779H0_CLK_CP),

	DEF_MOD("tsc2:tsc1",	919,	R8A779H0_CLK_CL16M),

	DEF_MOD("ssiu",		2926,	R8A779H0_CLK_S0D6_PER),

	DEF_MOD("ssi",		2927,	R8A779H0_CLK_S0D6_PER),

};



/*