Commit 23ec57a3 authored by Frank Wang's avatar Frank Wang Committed by Heiko Stuebner
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arm64: dts: rockchip: add usb related nodes for rk3576 



This adds USB and USB-PHY related nodes for RK3576 SoC.

Signed-off-by: default avatarFrank Wang <frank.wang@rock-chips.com>
Signed-off-by: default avatarKever Yang <kever.yang@rock-chips.com>
Link: https://lore.kernel.org/r/20250107074911.550057-5-kever.yang@rock-chips.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent ddbf63b2

arch/arm64/boot/dts/rockchip/rk3576.dtsi

+133 −0
Original line number Diff line number Diff line
@@ -445,6 +445,58 @@ soc { 
		#size-cells = <2>;

		ranges;



		usb_drd0_dwc3: usb@23000000 {

			compatible = "rockchip,rk3576-dwc3", "snps,dwc3";

			reg = <0x0 0x23000000 0x0 0x400000>;

			clocks = <&cru CLK_REF_USB3OTG0>,

				 <&cru CLK_SUSPEND_USB3OTG0>,

				 <&cru ACLK_USB3OTG0>;

			clock-names = "ref_clk", "suspend_clk", "bus_clk";

			interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;

			power-domains = <&power RK3576_PD_USB>;

			resets = <&cru SRST_A_USB3OTG0>;

			dr_mode = "otg";

			phys = <&u2phy0_otg>, <&usbdp_phy PHY_TYPE_USB3>;

			phy-names = "usb2-phy", "usb3-phy";

			phy_type = "utmi_wide";

			snps,dis_enblslpm_quirk;

			snps,dis-u1-entry-quirk;

			snps,dis-u2-entry-quirk;

			snps,dis-u2-freeclk-exists-quirk;

			snps,dis-del-phy-power-chg-quirk;

			snps,dis-tx-ipgap-linecheck-quirk;

			snps,parkmode-disable-hs-quirk;

			snps,parkmode-disable-ss-quirk;

			status = "disabled";

		};



		usb_drd1_dwc3: usb@23400000 {

			compatible = "rockchip,rk3576-dwc3", "snps,dwc3";

			reg = <0x0 0x23400000 0x0 0x400000>;

			clocks = <&cru CLK_REF_USB3OTG1>,

				 <&cru CLK_SUSPEND_USB3OTG1>,

				 <&cru ACLK_USB3OTG1>;

			clock-names = "ref_clk", "suspend_clk", "bus_clk";

			interrupts = <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>;

			power-domains = <&power RK3576_PD_PHP>;

			resets = <&cru SRST_A_USB3OTG1>;

			dr_mode = "otg";

			phys = <&u2phy1_otg>, <&combphy1_psu PHY_TYPE_USB3>;

			phy-names = "usb2-phy", "usb3-phy";

			phy_type = "utmi_wide";

			snps,dis_enblslpm_quirk;

			snps,dis-u1-entry-quirk;

			snps,dis-u2-entry-quirk;

			snps,dis-u2-freeclk-exists-quirk;

			snps,dis-del-phy-power-chg-quirk;

			snps,dis-tx-ipgap-linecheck-quirk;

			snps,dis_rxdet_inp3_quirk;

			snps,parkmode-disable-hs-quirk;

			snps,parkmode-disable-ss-quirk;

			dma-coherent;

			status = "disabled";

		};



		sys_grf: syscon@2600a000 {

			compatible = "rockchip,rk3576-sys-grf", "syscon";

			reg = <0x0 0x2600a000 0x0 0x2000>;
@@ -515,6 +567,65 @@ usbdpphy_grf: syscon@2602c000 { 
			reg = <0x0 0x2602c000 0x0 0x2000>;

		};



		usb2phy_grf: syscon@2602e000 {

			compatible = "rockchip,rk3576-usb2phy-grf", "syscon", "simple-mfd";

			reg = <0x0 0x2602e000 0x0 0x4000>;

			#address-cells = <1>;

			#size-cells = <1>;



			u2phy0: usb2-phy@0 {

				compatible = "rockchip,rk3576-usb2phy";

				reg = <0x0 0x10>;

				resets = <&cru SRST_OTGPHY_0>, <&cru SRST_P_USBPHY_GRF_0>;

				reset-names = "phy", "apb";

				clocks = <&cru CLK_PHY_REF_SRC>,

					 <&cru ACLK_MMU2>,

					 <&cru ACLK_SLV_MMU2>;

				clock-names = "phyclk", "aclk", "aclk_slv";

				clock-output-names = "usb480m_phy0";

				#clock-cells = <0>;

				status = "disabled";



				u2phy0_otg: otg-port {

					#phy-cells = <0>;

					interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>,

						     <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>,

						     <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;

					interrupt-names = "otg-bvalid", "otg-id", "linestate";

					status = "disabled";

				};

			};



			u2phy1: usb2-phy@2000 {

				compatible = "rockchip,rk3576-usb2phy";

				reg = <0x2000 0x10>;

				resets = <&cru SRST_OTGPHY_1>, <&cru SRST_P_USBPHY_GRF_1>;

				reset-names = "phy", "apb";

				clocks = <&cru CLK_PHY_REF_SRC>,

					 <&cru ACLK_MMU1>,

					 <&cru ACLK_SLV_MMU1>;

				clock-names = "phyclk", "aclk", "aclk_slv";

				clock-output-names = "usb480m_phy1";

				#clock-cells = <0>;

				status = "disabled";



				u2phy1_otg: otg-port {

					#phy-cells = <0>;

					interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>,

						     <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>,

						     <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;

					interrupt-names = "otg-bvalid", "otg-id", "linestate";

					status = "disabled";

				};

			};

		};



		vo1_grf: syscon@26036000 {

			compatible = "rockchip,rk3576-vo1-grf", "syscon";

			reg = <0x0 0x26036000 0x0 0x100>;

			clocks = <&cru PCLK_VO1_ROOT>;

		};



		sdgmac_grf: syscon@26038000 {

			compatible = "rockchip,rk3576-sdgmac-grf", "syscon";

			reg = <0x0 0x26038000 0x0 0x1000>;
@@ -1623,6 +1734,28 @@ combphy1_psu: phy@2b060000 { 
			status = "disabled";

		};



		usbdp_phy: phy@2b010000 {

			compatible = "rockchip,rk3576-usbdp-phy";

			reg = <0x0 0x2b010000 0x0 0x10000>;

			#phy-cells = <1>;

			clocks = <&cru CLK_PHY_REF_SRC >,

				 <&cru CLK_USBDP_COMBO_PHY_IMMORTAL>,

				 <&cru PCLK_USBDPPHY>,

				 <&u2phy0>;

			clock-names = "refclk", "immortal", "pclk", "utmi";

			resets = <&cru SRST_USBDP_COMBO_PHY_INIT>,

				 <&cru SRST_USBDP_COMBO_PHY_CMN>,

				 <&cru SRST_USBDP_COMBO_PHY_LANE>,

				 <&cru SRST_USBDP_COMBO_PHY_PCS>,

				 <&cru SRST_P_USBDPPHY>;

			reset-names = "init", "cmn", "lane", "pcs_apb", "pma_apb";

			rockchip,u2phy-grf = <&usb2phy_grf>;

			rockchip,usb-grf = <&usb_grf>;

			rockchip,usbdpphy-grf = <&usbdpphy_grf>;

			rockchip,vo-grf = <&vo1_grf>;

			status = "disabled";

		};



		sram: sram@3ff88000 {

			compatible = "mmio-sram";

			reg = <0x0 0x3ff88000 0x0 0x78000>;