Commit 26043515 authored by Michael Riesch's avatar Michael Riesch Committed by Vinod Koul
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phy: rockchip: phy-rockchip-inno-csidphy: allow for different reset lines



The RK3588 MIPI CSI-2 DPHY variant requires two reset lines. Add support
for different sets of reset lines to the phy-rockchip-inno-csidphy driver
as preparation for the introduction of the RK3588 variant.

Signed-off-by: default avatarMichael Riesch <michael.riesch@collabora.com>
Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-5-a4f340a7f0cf@collabora.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 8c7c1946
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+30 −4
Original line number Diff line number Diff line
@@ -67,6 +67,8 @@
#define RK1808_CSIDPHY_CLK_CALIB_EN		0x168
#define RK3568_CSIDPHY_CLK_CALIB_EN		0x168

#define RESETS_MAX				2

/*
 * The higher 16-bit of this register is used for write protection
 * only if BIT(x + 16) set to 1 the BIT(x) can be written.
@@ -127,6 +129,8 @@ struct dphy_drv_data {
	const struct hsfreq_range *hsfreq_ranges;
	int num_hsfreq_ranges;
	const struct dphy_reg *grf_regs;
	const char *const *resets;
	unsigned int resets_num;
};

struct rockchip_inno_csidphy {
@@ -134,7 +138,8 @@ struct rockchip_inno_csidphy {
	void __iomem *phy_base;
	struct clk *pclk;
	struct regmap *grf;
	struct reset_control *rst;
	struct reset_control_bulk_data resets[RESETS_MAX];
	unsigned int resets_num;
	const struct dphy_drv_data *drv_data;
	struct phy_configure_opts_mipi_dphy config;
	u8 hsfreq;
@@ -174,6 +179,10 @@ static const struct hsfreq_range rk3368_mipidphy_hsfreq_ranges[] = {
	{1249, 0x0c}, {1349, 0x0d}, {1500, 0x0e}
};

static const char *const rk3368_reset_names[] = {
	"apb"
};

static void rockchip_inno_csidphy_ths_settle(struct rockchip_inno_csidphy *priv,
					     int hsfreq, int offset)
{
@@ -344,6 +353,8 @@ static const struct dphy_drv_data rk1808_mipidphy_drv_data = {
	.hsfreq_ranges = rk1808_mipidphy_hsfreq_ranges,
	.num_hsfreq_ranges = ARRAY_SIZE(rk1808_mipidphy_hsfreq_ranges),
	.grf_regs = rk1808_grf_dphy_regs,
	.resets = rk3368_reset_names,
	.resets_num = ARRAY_SIZE(rk3368_reset_names),
};

static const struct dphy_drv_data rk3326_mipidphy_drv_data = {
@@ -353,6 +364,8 @@ static const struct dphy_drv_data rk3326_mipidphy_drv_data = {
	.hsfreq_ranges = rk3326_mipidphy_hsfreq_ranges,
	.num_hsfreq_ranges = ARRAY_SIZE(rk3326_mipidphy_hsfreq_ranges),
	.grf_regs = rk3326_grf_dphy_regs,
	.resets = rk3368_reset_names,
	.resets_num = ARRAY_SIZE(rk3368_reset_names),
};

static const struct dphy_drv_data rk3368_mipidphy_drv_data = {
@@ -362,6 +375,8 @@ static const struct dphy_drv_data rk3368_mipidphy_drv_data = {
	.hsfreq_ranges = rk3368_mipidphy_hsfreq_ranges,
	.num_hsfreq_ranges = ARRAY_SIZE(rk3368_mipidphy_hsfreq_ranges),
	.grf_regs = rk3368_grf_dphy_regs,
	.resets = rk3368_reset_names,
	.resets_num = ARRAY_SIZE(rk3368_reset_names),
};

static const struct dphy_drv_data rk3568_mipidphy_drv_data = {
@@ -371,6 +386,8 @@ static const struct dphy_drv_data rk3568_mipidphy_drv_data = {
	.hsfreq_ranges = rk1808_mipidphy_hsfreq_ranges,
	.num_hsfreq_ranges = ARRAY_SIZE(rk1808_mipidphy_hsfreq_ranges),
	.grf_regs = rk3568_grf_dphy_regs,
	.resets = rk3368_reset_names,
	.resets_num = ARRAY_SIZE(rk3368_reset_names),
};

static const struct of_device_id rockchip_inno_csidphy_match_id[] = {
@@ -404,6 +421,7 @@ static int rockchip_inno_csidphy_probe(struct platform_device *pdev)
	struct device *dev = &pdev->dev;
	struct phy_provider *phy_provider;
	struct phy *phy;
	int ret;

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
@@ -435,10 +453,18 @@ static int rockchip_inno_csidphy_probe(struct platform_device *pdev)
		return PTR_ERR(priv->pclk);
	}

	priv->rst = devm_reset_control_get(dev, "apb");
	if (IS_ERR(priv->rst)) {
	if (priv->drv_data->resets_num > RESETS_MAX) {
		dev_err(dev, "invalid number of resets\n");
		return -EINVAL;
	}
	priv->resets_num = priv->drv_data->resets_num;
	for (unsigned int i = 0; i < priv->resets_num; i++)
		priv->resets[i].id = priv->drv_data->resets[i];
	ret = devm_reset_control_bulk_get_exclusive(dev, priv->resets_num,
						    priv->resets);
	if (ret) {
		dev_err(dev, "failed to get system reset control\n");
		return PTR_ERR(priv->rst);
		return ret;
	}

	phy = devm_phy_create(dev, NULL, &rockchip_inno_csidphy_ops);