Commit 8c7c1946 authored by Michael Riesch's avatar Michael Riesch Committed by Vinod Koul
Browse files

phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 



The driver for the Rockchip MIPI CSI-2 DPHY uses GRF register offset
value 0 to sort out undefined registers. However, the RK3588 CSIDPHY GRF
this offset is perfectly fine (in fact, register 0 is the only one in
this register file).
Introduce a boolean variable to indicate valid registers and allow writes
to register 0.

Reviewed-by: default avatarNeil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: default avatarMichael Riesch <michael.riesch@collabora.com>
Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-4-a4f340a7f0cf@collabora.com


Signed-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 5072b8e9

drivers/phy/rockchip/phy-rockchip-inno-csidphy.c

+3 −2
Original line number Diff line number Diff line
@@ -87,10 +87,11 @@ struct dphy_reg { 
	u32 offset;

	u32 mask;

	u32 shift;

	u8 valid;

};



#define PHY_REG(_offset, _width, _shift) \

	{ .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, }

	{ .offset = _offset, .mask = BIT(_width) - 1, .shift = _shift, .valid = 1, }



static const struct dphy_reg rk1808_grf_dphy_regs[] = {

	[GRF_DPHY_CSIPHY_FORCERXMODE] = PHY_REG(RK1808_GRF_PD_VI_CON_OFFSET, 4, 0),
@@ -145,7 +146,7 @@ static inline void write_grf_reg(struct rockchip_inno_csidphy *priv, 
	const struct dphy_drv_data *drv_data = priv->drv_data;

	const struct dphy_reg *reg = &drv_data->grf_regs[index];



	if (reg->offset)

	if (reg->valid)

		regmap_write(priv->grf, reg->offset,

			     HIWORD_UPDATE(value, reg->mask, reg->shift));

}