Commit 264488bf authored by Michael Ellerman's avatar Michael Ellerman Committed by Andrew Morton
Browse files

powerpc/64e: consolidate TLB miss handler patching 

The 64e TLB miss handler patching is done in setup_mmu_htw(), and then
again immediately afterward in early_init_mmu_global().  Consolidate it
into a single location.

Link: https://lkml.kernel.org/r/7033b37493fb48a3e5245b59d0a42afb75dabfc1.1719928057.git.christophe.leroy@csgroup.eu


Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Signed-off-by: default avatarChristophe Leroy <christophe.leroy@csgroup.eu>
Cc: Jason Gunthorpe <jgg@nvidia.com>
Cc: Nicholas Piggin <npiggin@gmail.com>
Cc: Oscar Salvador <osalvador@suse.de>
Cc: Peter Xu <peterx@redhat.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent aca69900

arch/powerpc/mm/nohash/tlb_64e.c

+15 −23
Original line number Diff line number Diff line
@@ -169,24 +169,6 @@ static void __init setup_page_sizes(void) 
	}

}



static void __init setup_mmu_htw(void)

{

	/*

	 * If we want to use HW tablewalk, enable it by patching the TLB miss

	 * handlers to branch to the one dedicated to it.

	 */



	switch (book3e_htw_mode) {

	case PPC_HTW_E6500:

		extlb_level_exc = EX_TLB_SIZE;

		patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e);

		patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e);

		break;

	}

	pr_info("MMU: Book3E HW tablewalk %s\n",

		book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported");

}



/*

 * Early initialization of the MMU TLB code

 */
@@ -252,15 +234,25 @@ static void __init early_init_mmu_global(void) 
	/* Look for supported page sizes */

	setup_page_sizes();



	/* Look for HW tablewalk support */

	setup_mmu_htw();



	if (book3e_htw_mode == PPC_HTW_NONE) {

	/*

	 * If we want to use HW tablewalk, enable it by patching the TLB miss

	 * handlers to branch to the one dedicated to it.

	 */

	extlb_level_exc = EX_TLB_SIZE;

	switch (book3e_htw_mode) {

	case PPC_HTW_E6500:

		patch_exception(0x1c0, exc_data_tlb_miss_e6500_book3e);

		patch_exception(0x1e0, exc_instruction_tlb_miss_e6500_book3e);

		break;

	case PPC_HTW_NONE:

		patch_exception(0x1c0, exc_data_tlb_miss_bolted_book3e);

		patch_exception(0x1e0, exc_instruction_tlb_miss_bolted_book3e);

		break;

	}



	pr_info("MMU: Book3E HW tablewalk %s\n",

		book3e_htw_mode != PPC_HTW_NONE ? "enabled" : "not supported");



	/* Set the global containing the top of the linear mapping

	 * for use by the TLB miss code

	 */