Commit 26a6a9cd authored by Tim Harvey's avatar Tim Harvey Committed by Shawn Guo
Browse files

arm64: dts: imx8mp-venice-gw74xx: update name of M2SKT_WDIS2# gpio 



The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket. Update the gpio name for consistency.

Fixes: 6a5d95b0 ("arm64: dts: imx8mp-venice-gw74xx: add M2SKT_GPIO10 gpio configuration")
Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent e396254c

arch/arm64/boot/dts/freescale/imx8mp-venice-gw74xx.dts

+4 −4
Original line number Diff line number Diff line
@@ -301,7 +301,7 @@ &gpio2 { 
&gpio3 {

	gpio-line-names =

		"", "", "", "", "", "", "m2_rst", "",

		"", "", "", "", "", "", "m2_gpio10", "",

		"", "", "", "", "", "", "m2_wdis2#", "",

		"", "", "", "", "", "", "", "",

		"", "", "", "", "", "", "", "";

};
@@ -310,7 +310,7 @@ &gpio4 { 
	gpio-line-names =

		"", "", "m2_off#", "", "", "", "", "",

		"", "", "", "", "", "", "", "",

		"", "", "m2_wdis#", "", "", "", "", "",

		"", "", "m2_wdis1#", "", "", "", "", "",

		"", "", "", "", "", "", "", "rs485_en";

};
@@ -811,14 +811,14 @@ pinctrl_hog: hoggrp { 
			MX8MP_IOMUXC_GPIO1_IO09__GPIO1_IO09	0x40000040 /* DIO0 */

			MX8MP_IOMUXC_GPIO1_IO11__GPIO1_IO11	0x40000040 /* DIO1 */

			MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02	0x40000040 /* M2SKT_OFF# */

			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x40000150 /* M2SKT_WDIS# */

			MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18	0x40000150 /* M2SKT_WDIS1# */

			MX8MP_IOMUXC_SD1_DATA4__GPIO2_IO06	0x40000040 /* M2SKT_PIN20 */

			MX8MP_IOMUXC_SD1_STROBE__GPIO2_IO11	0x40000040 /* M2SKT_PIN22 */

			MX8MP_IOMUXC_SD2_CLK__GPIO2_IO13	0x40000150 /* PCIE1_WDIS# */

			MX8MP_IOMUXC_SD2_CMD__GPIO2_IO14	0x40000150 /* PCIE3_WDIS# */

			MX8MP_IOMUXC_SD2_DATA3__GPIO2_IO18	0x40000150 /* PCIE2_WDIS# */

			MX8MP_IOMUXC_NAND_DATA00__GPIO3_IO06	0x40000040 /* M2SKT_RST# */

			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0x40000040 /* M2SKT_GPIO10 */

			MX8MP_IOMUXC_NAND_DQS__GPIO3_IO14	0x40000150 /* M2KST_WDIS2# */

			MX8MP_IOMUXC_SAI3_TXD__GPIO5_IO01	0x40000104 /* UART_TERM */

			MX8MP_IOMUXC_SAI3_TXFS__GPIO4_IO31	0x40000104 /* UART_RS485 */

			MX8MP_IOMUXC_SAI3_TXC__GPIO5_IO00	0x40000104 /* UART_HALF */