Commit 28251d72 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: implement smu_cmn_get_enabled_mask() for all ASICs 



Instead of having each for smu v11 and v12.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b4bb3aaf

drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

+2 −2
Original line number Diff line number Diff line
@@ -1824,7 +1824,7 @@ static bool arcturus_is_dpm_running(struct smu_context *smu) 
	int ret = 0;

	uint32_t feature_mask[2];

	unsigned long feature_enabled;

	ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);

	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);

	feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |

			   ((uint64_t)feature_mask[1] << 32));

	return !!(feature_enabled & SMC_DPM_FEATURE);
@@ -2284,7 +2284,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = { 
	.send_smc_msg_with_param = smu_v11_0_send_msg_with_param,

	.init_display_count = NULL,

	.set_allowed_mask = smu_v11_0_set_allowed_mask,

	.get_enabled_mask = smu_v11_0_get_enabled_mask,

	.get_enabled_mask = smu_cmn_get_enabled_mask,

	.feature_is_enabled = smu_cmn_feature_is_enabled,

	.notify_display_change = NULL,

	.set_power_limit = smu_v11_0_set_power_limit,

drivers/gpu/drm/amd/powerplay/inc/smu_v11_0.h

+0 −3
Original line number Diff line number Diff line
@@ -177,9 +177,6 @@ int smu_v11_0_init_display_count(struct smu_context *smu, uint32_t count); 


int smu_v11_0_set_allowed_mask(struct smu_context *smu);



int smu_v11_0_get_enabled_mask(struct smu_context *smu,

				      uint32_t *feature_mask, uint32_t num);



int smu_v11_0_notify_display_change(struct smu_context *smu);



int smu_v11_0_get_current_power_limit(struct smu_context *smu,

drivers/gpu/drm/amd/powerplay/inc/smu_v12_0.h

+0 −3
Original line number Diff line number Diff line
@@ -64,9 +64,6 @@ int smu_v12_0_fini_smc_tables(struct smu_context *smu); 


int smu_v12_0_set_default_dpm_tables(struct smu_context *smu);



int smu_v12_0_get_enabled_mask(struct smu_context *smu,

				      uint32_t *feature_mask, uint32_t num);



int smu_v12_0_mode2_reset(struct smu_context *smu);



int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+2 −2
Original line number Diff line number Diff line
@@ -1321,7 +1321,7 @@ static bool navi10_is_dpm_running(struct smu_context *smu) 
	int ret = 0;

	uint32_t feature_mask[2];

	unsigned long feature_enabled;

	ret = smu_feature_get_enabled_mask(smu, feature_mask, 2);

	ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2);

	feature_enabled = (unsigned long)((uint64_t)feature_mask[0] |

			   ((uint64_t)feature_mask[1] << 32));

	return !!(feature_enabled & SMC_DPM_FEATURE);
@@ -2299,7 +2299,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { 
	.send_smc_msg_with_param = smu_v11_0_send_msg_with_param,

	.init_display_count = smu_v11_0_init_display_count,

	.set_allowed_mask = smu_v11_0_set_allowed_mask,

	.get_enabled_mask = smu_v11_0_get_enabled_mask,

	.get_enabled_mask = smu_cmn_get_enabled_mask,

	.feature_is_enabled = smu_cmn_feature_is_enabled,

	.notify_display_change = smu_v11_0_notify_display_change,

	.set_power_limit = smu_v11_0_set_power_limit,

drivers/gpu/drm/amd/powerplay/renoir_ppt.c

+1 −1
Original line number Diff line number Diff line
@@ -1018,7 +1018,7 @@ static const struct pptable_funcs renoir_ppt_funcs = { 
	.init_smc_tables = smu_v12_0_init_smc_tables,

	.fini_smc_tables = smu_v12_0_fini_smc_tables,

	.set_default_dpm_table = smu_v12_0_set_default_dpm_tables,

	.get_enabled_mask = smu_v12_0_get_enabled_mask,

	.get_enabled_mask = smu_cmn_get_enabled_mask,

	.feature_is_enabled = smu_cmn_feature_is_enabled,

	.get_dpm_ultimate_freq = renoir_get_dpm_ultimate_freq,

	.mode2_reset = smu_v12_0_mode2_reset,