Commit 2a3ebad4 authored by Chunyan Zhang's avatar Chunyan Zhang Committed by Andrew Morton
Browse files

riscv: mm: add soft-dirty page tracking support 

The Svrsw60t59b extension allows to free the PTE reserved bits 60 and 59
for software, this patch uses bit 59 for soft-dirty.

To add swap PTE soft-dirty tracking, we borrow bit 3 which is available
for swap PTEs on RISC-V systems.

Link: https://lkml.kernel.org/r/20251113072806.795029-5-zhangchunyan@iscas.ac.cn


Signed-off-by: default avatarChunyan Zhang <zhangchunyan@iscas.ac.cn>
Reviewed-by: default avatarDeepak Gupta <debug@rivosinc.com>
Cc: Albert Ou <aou@eecs.berkeley.edu>
Cc: Alexandre Ghiti <alex@ghiti.fr>
Cc: Alexandre Ghiti <alexghiti@rivosinc.com>
Cc: Al Viro <viro@zeniv.linux.org.uk>
Cc: Andrew Jones <ajones@ventanamicro.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Axel Rasmussen <axelrasmussen@google.com>
Cc: Christian Brauner <brauner@kernel.org>
Cc: Conor Dooley <conor.dooley@microchip.com>
Cc: Conor Dooley <conor@kernel.org>
Cc: David Hildenbrand <david@redhat.com>
Cc: Jan Kara <jack@suse.cz>
Cc: Liam Howlett <liam.howlett@oracle.com>
Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Mike Rapoport <rppt@kernel.org>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Peter Xu <peterx@redhat.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Suren Baghdasaryan <surenb@google.com>
Cc: Vlastimil Babka <vbabka@suse.cz>
Cc: Yuanchu Xie <yuanchu@google.com>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
parent 59f6acb4

arch/riscv/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -142,6 +142,7 @@ config RISCV 
	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if COMPAT

	select HAVE_ARCH_RANDOMIZE_KSTACK_OFFSET

	select HAVE_ARCH_SECCOMP_FILTER

	select HAVE_ARCH_SOFT_DIRTY if 64BIT && MMU && RISCV_ISA_SVRSW60T59B

	select HAVE_ARCH_THREAD_STRUCT_WHITELIST

	select HAVE_ARCH_TRACEHOOK

	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if 64BIT && MMU

arch/riscv/include/asm/pgtable-bits.h

+19 −0
Original line number Diff line number Diff line
@@ -19,6 +19,25 @@ 
#define _PAGE_SOFT      (3 << 8)    /* Reserved for software */



#define _PAGE_SPECIAL   (1 << 8)    /* RSW: 0x1 */



#ifdef CONFIG_MEM_SOFT_DIRTY



/* ext_svrsw60t59b: bit 59 for soft-dirty tracking */

#define _PAGE_SOFT_DIRTY						\

	((riscv_has_extension_unlikely(RISCV_ISA_EXT_SVRSW60T59B)) ?	\

	 (1UL << 59) : 0)

/*

 * Bit 3 is always zero for swap entry computation, so we

 * can borrow it for swap page soft-dirty tracking.

 */

#define _PAGE_SWP_SOFT_DIRTY						\

	((riscv_has_extension_unlikely(RISCV_ISA_EXT_SVRSW60T59B)) ?	\

	 _PAGE_EXEC : 0)

#else

#define _PAGE_SOFT_DIRTY	0

#define _PAGE_SWP_SOFT_DIRTY	0

#endif /* CONFIG_MEM_SOFT_DIRTY */



#define _PAGE_TABLE     _PAGE_PRESENT



/*

arch/riscv/include/asm/pgtable.h

+73 −2
Original line number Diff line number Diff line
@@ -428,7 +428,7 @@ static inline pte_t pte_mkwrite_novma(pte_t pte) 


static inline pte_t pte_mkdirty(pte_t pte)

{

	return __pte(pte_val(pte) | _PAGE_DIRTY);

	return __pte(pte_val(pte) | _PAGE_DIRTY | _PAGE_SOFT_DIRTY);

}



static inline pte_t pte_mkclean(pte_t pte)
@@ -456,6 +456,42 @@ static inline pte_t pte_mkhuge(pte_t pte) 
	return pte;

}



#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY

#define pgtable_supports_soft_dirty()				\

	(IS_ENABLED(CONFIG_MEM_SOFT_DIRTY) &&			\

	 riscv_has_extension_unlikely(RISCV_ISA_EXT_SVRSW60T59B))



static inline bool pte_soft_dirty(pte_t pte)

{

	return !!(pte_val(pte) & _PAGE_SOFT_DIRTY);

}



static inline pte_t pte_mksoft_dirty(pte_t pte)

{

	return __pte(pte_val(pte) | _PAGE_SOFT_DIRTY);

}



static inline pte_t pte_clear_soft_dirty(pte_t pte)

{

	return __pte(pte_val(pte) & ~(_PAGE_SOFT_DIRTY));

}



static inline bool pte_swp_soft_dirty(pte_t pte)

{

	return !!(pte_val(pte) & _PAGE_SWP_SOFT_DIRTY);

}



static inline pte_t pte_swp_mksoft_dirty(pte_t pte)

{

	return __pte(pte_val(pte) | _PAGE_SWP_SOFT_DIRTY);

}



static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)

{

	return __pte(pte_val(pte) & ~(_PAGE_SWP_SOFT_DIRTY));

}

#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */



#ifdef CONFIG_RISCV_ISA_SVNAPOT

#define pte_leaf_size(pte)	(pte_napot(pte) ?				\

					napot_cont_size(napot_cont_order(pte)) :\
@@ -805,6 +841,40 @@ static inline pud_t pud_mkspecial(pud_t pud) 
}

#endif



#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY

static inline bool pmd_soft_dirty(pmd_t pmd)

{

	return pte_soft_dirty(pmd_pte(pmd));

}



static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)

{

	return pte_pmd(pte_mksoft_dirty(pmd_pte(pmd)));

}



static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)

{

	return pte_pmd(pte_clear_soft_dirty(pmd_pte(pmd)));

}



#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION

static inline bool pmd_swp_soft_dirty(pmd_t pmd)

{

	return pte_swp_soft_dirty(pmd_pte(pmd));

}



static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)

{

	return pte_pmd(pte_swp_mksoft_dirty(pmd_pte(pmd)));

}



static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)

{

	return pte_pmd(pte_swp_clear_soft_dirty(pmd_pte(pmd)));

}

#endif /* CONFIG_ARCH_ENABLE_THP_MIGRATION */

#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */



static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,

				pmd_t *pmdp, pmd_t pmd)

{
@@ -1003,7 +1073,8 @@ static inline pud_t pud_modify(pud_t pud, pgprot_t newprot) 
 *

 * Format of swap PTE:

 *	bit            0:	_PAGE_PRESENT (zero)

 *	bit       1 to 3:       _PAGE_LEAF (zero)

 *	bit       1 to 2:	(zero)

 *	bit            3:	_PAGE_SWP_SOFT_DIRTY

 *	bit            5:	_PAGE_PROT_NONE (zero)

 *	bit            6:	exclusive marker

 *	bits      7 to 11:	swap type