Commit 2aa722b6 authored by Nikita Yushchenko's avatar Nikita Yushchenko Committed by Jakub Kicinski
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net: renesas: rswitch: use generic MPSM operation for mdio C45



Introduce rswitch_etha_mpsm_op() that accepts values for MPSM register
fields and executes the transaction.

This avoids some code duptication, and can be used both for C45 and C22.

Convert C45 read and write operations to use that.

Signed-off-by: default avatarNikita Yushchenko <nikita.yoush@cogentembedded.com>
Reviewed-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: default avatarYoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://patch.msgid.link/20241216071957.2587354-5-nikita.yoush@cogentembedded.com


Signed-off-by: default avatarJakub Kicinski <kuba@kernel.org>
parent 1ced1b8c
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+29 −22
Original line number Diff line number Diff line
@@ -1195,36 +1195,29 @@ static int rswitch_etha_hw_init(struct rswitch_etha *etha, const u8 *mac)
	return rswitch_etha_change_mode(etha, EAMC_OPC_OPERATION);
}

static int rswitch_etha_set_access(struct rswitch_etha *etha, bool read,
				   int phyad, int devad, int regad, int data)
static int rswitch_etha_mpsm_op(struct rswitch_etha *etha, bool read,
				unsigned int mmf, unsigned int pda,
				unsigned int pra, unsigned int pop,
				unsigned int prd)
{
	int pop = read ? MDIO_READ_C45 : MDIO_WRITE_C45;
	u32 val;
	int ret;

	if (devad == 0xffffffff)
		return -ENODEV;

	val = MPSM_PSME | MPSM_MFF_C45;
	iowrite32((regad << 16) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM);
	val = MPSM_PSME |
	      FIELD_PREP(MPSM_MFF, mmf) |
	      FIELD_PREP(MPSM_PDA, pda) |
	      FIELD_PREP(MPSM_PRA, pra) |
	      FIELD_PREP(MPSM_POP, pop) |
	      FIELD_PREP(MPSM_PRD, prd);
	iowrite32(val, etha->addr + MPSM);

	ret = rswitch_reg_wait(etha->addr, MPSM, MPSM_PSME, 0);
	if (ret)
		return ret;

	if (read) {
		writel((pop << 13) | (devad << 8) | (phyad << 3) | val, etha->addr + MPSM);

		ret = rswitch_reg_wait(etha->addr, MPSM, MPSM_PSME, 0);
		if (ret)
			return ret;

		ret = (ioread32(etha->addr + MPSM) & MPSM_PRD_MASK) >> 16;
	} else {
		iowrite32((data << 16) | (pop << 13) | (devad << 8) | (phyad << 3) | val,
			  etha->addr + MPSM);

		ret = rswitch_reg_wait(etha->addr, MPSM, MPSM_PSME, 0);
		val = ioread32(etha->addr + MPSM);
		ret = FIELD_GET(MPSM_PRD, val);
	}

	return ret;
@@ -1234,16 +1227,30 @@ static int rswitch_etha_mii_read_c45(struct mii_bus *bus, int addr, int devad,
				     int regad)
{
	struct rswitch_etha *etha = bus->priv;
	int ret;

	ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
				   MPSM_POP_ADDRESS, regad);
	if (ret)
		return ret;

	return rswitch_etha_set_access(etha, true, addr, devad, regad, 0);
	return rswitch_etha_mpsm_op(etha, true, MPSM_MMF_C45, addr, devad,
				    MPSM_POP_READ_C45, 0);
}

static int rswitch_etha_mii_write_c45(struct mii_bus *bus, int addr, int devad,
				      int regad, u16 val)
{
	struct rswitch_etha *etha = bus->priv;
	int ret;

	ret = rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
				   MPSM_POP_ADDRESS, regad);
	if (ret)
		return ret;

	return rswitch_etha_set_access(etha, false, addr, devad, regad, val);
	return rswitch_etha_mpsm_op(etha, false, MPSM_MMF_C45, addr, devad,
				    MPSM_POP_WRITE, val);
}

/* Call of_node_put(port) after done */
+11 −6
Original line number Diff line number Diff line
@@ -735,13 +735,18 @@ enum rswitch_etha_mode {
#define MPIC_PSMCS		GENMASK(22, 16)
#define MPIC_PSMHT		GENMASK(26, 24)

#define MDIO_READ_C45		0x03
#define MDIO_WRITE_C45		0x01

#define MPSM_PSME		BIT(0)
#define MPSM_MFF_C45		BIT(2)
#define MPSM_PRD_SHIFT		16
#define MPSM_PRD_MASK		GENMASK(31, MPSM_PRD_SHIFT)
#define MPSM_MFF		BIT(2)
#define MPSM_MMF_C22		0
#define MPSM_MMF_C45		1
#define MPSM_PDA		GENMASK(7, 3)
#define MPSM_PRA		GENMASK(12, 8)
#define MPSM_POP		GENMASK(14, 13)
#define MPSM_POP_ADDRESS	0
#define MPSM_POP_WRITE		1
#define MPSM_POP_READ_C22	2
#define MPSM_POP_READ_C45	3
#define MPSM_PRD		GENMASK(31, 16)

#define MLVC_PLV		BIT(16)