Commit 2b733286 authored by Paul Kocialkowski's avatar Paul Kocialkowski Committed by Chen-Yu Tsai
Browse files

clk: sunxi-ng: v3s: Fix CSI1 MCLK clock name 



The CSI1 MCLK clock is reported as "csi-mclk" while it is specific to
CSI1 as the name of the definition indicates. Fix it in the driver.

Fixes: d0f11d14 ("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: default avatarPaul Kocialkowski <paulk@sys-base.io>
Reviewed-By: default avatarIcenowy Zheng <uwu@icenowy.me>
Link: https://patch.msgid.link/20250701201124.812882-4-paulk@sys-base.io


Signed-off-by: default avatarChen-Yu Tsai <wens@csie.org>
parent f45b2949

drivers/clk/sunxi-ng/ccu-sun8i-v3s.c

+1 −1
Original line number Diff line number Diff line
@@ -366,7 +366,7 @@ static const char * const csi_sclk_parents[] = { "pll-video", "pll-isp" }; 
static SUNXI_CCU_M_WITH_MUX_GATE(csi_sclk_clk, "csi-sclk", csi_sclk_parents,

				 0x134, 16, 4, 24, 3, BIT(31), 0);



static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi-mclk", csi_mclk_parents,

static SUNXI_CCU_M_WITH_MUX_GATE(csi1_mclk_clk, "csi1-mclk", csi_mclk_parents,

				 0x134, 0, 5, 8, 3, BIT(15), 0);



static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve",