Commit 2c23a919 authored by Oleksij Rempel's avatar Oleksij Rempel Committed by Shawn Guo
Browse files

ARM: dts: imx6dl-victgo: configure ethernet reference clock parent 



On this board the PHY is the ref clock provider. So, configure ethernet
reference clock as input.

Signed-off-by: default avatarOleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 03c8a3c7

arch/arm/boot/dts/imx6dl-victgo.dts

+8 −4
Original line number Diff line number Diff line
@@ -54,6 +54,7 @@ clk50m_phy: phy-clock { 
		compatible = "fixed-clock";

		#clock-cells = <0>;

		clock-frequency = <50000000>;

		clock-output-names = "enet_ref_pad";

	};



	rotary-encoder {
@@ -134,6 +135,13 @@ vdiv_hitch_pos: voltage-divider-hitch-pos { 
	};

};



&clks {

	clocks = <&clk50m_phy>;

	clock-names = "enet_ref_pad";

	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;

	assigned-clock-parents = <&clk50m_phy>;

};



&ecspi2 {

	cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>;

	pinctrl-names = "default";
@@ -182,10 +190,6 @@ &fec { 
	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "rmii";

	clocks = <&clks IMX6QDL_CLK_ENET>,

		 <&clks IMX6QDL_CLK_ENET>,

		 <&clk50m_phy>;

	clock-names = "ipg", "ahb", "ptp";

	phy-handle = <&rmii_phy>;

	status = "okay";