Commit 2cf615a4 authored by Tony Luck's avatar Tony Luck Committed by Dave Hansen
Browse files

x86/platform/intel-mid: Switch to new Intel CPU model defines 



New CPU #defines encode vendor and family as well as model.

N.B. Drop Haswell. CPU model 0x3C was included by mistake
in upstream code.

Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
Signed-off-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Acked-by: default avatarAndy Shevchenko <andy@kernel.org>
Link: https://lore.kernel.org/all/20240521161002.12866-1-tony.luck%40intel.com
parent 079544ec

arch/x86/platform/intel-mid/intel-mid.c

+3 −3
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <asm/mpspec_def.h>

#include <asm/hw_irq.h>

#include <asm/apic.h>

#include <asm/cpu_device_id.h>

#include <asm/io_apic.h>

#include <asm/intel-mid.h>

#include <asm/io.h>
@@ -55,9 +56,8 @@ static void __init intel_mid_time_init(void) 


static void intel_mid_arch_setup(void)

{

	switch (boot_cpu_data.x86_model) {

	case 0x3C:

	case 0x4A:

	switch (boot_cpu_data.x86_vfm) {

	case INTEL_ATOM_SILVERMONT_MID:

		x86_platform.legacy.rtc = 1;

		break;

	default: