Commit 31b43c07 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull SoC driver updates from Arnd Bergmann:
 "The driver updates again are all over the place with many minor fixes
  going into platform specific code. The most notable changes are:

   - Support for Microchip pic64gx system controllers
   - Work on cleaning up devicetree bindings for SoC drivers, and
     converting them into the new format
   - Lots of smaller changes for Qualcomm SoC drivers, including support
     for a number of newly supported chips
   - reset controller API cleanups and a new driver for Cix Sky1
   - Reworks of the Tegra PMC and CBB drivers, along with a change to
     how individual Tegra SoCs get selected in Kconfig and BPMP firmware
     driver updates including a refresh of the ABI header to match the
     version used by firmware
   - STM32 updates to the firewall bus driver and support for the debug
     bus through OP-TEE
   - SCMI firmware driver improvements for reliability, in particular
     for dealing with broken firmware interrupts
   - Memory driver updates for Tegra, and a patch to remove the unused
     Baikal T1 driver"

* tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (193 commits)
  firmware: arm_ffa: Use the correct buffer size during RXTX_MAP
  firmware: qcom: scm: Allow QSEECOM on Lenovo IdeaCentre Mini X
  clk: spear: fix resource leak in clk_register_vco_pll()
  reset: rzv2h-usb2phy: Add support for VBUS mux controller registration
  reset: rzv2h-usb2phy: Convert to regmap API
  dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset
  dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property
  soc: microchip: add mpfs gpio interrupt mux driver
  dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux
  gpio: mpfs: Add interrupt support
  soc: qcom: ubwc: add helpers to get programmable values
  soc: qcom: ubwc: add helper to get min_acc length
  firmware: qcom: scm: Register gunyah watchdog device
  soc: qcom: socinfo: Add SoC ID for SA8650P
  dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P
  firmware: qcom: scm: Allow QSEECOM on Mahua CRD
  soc: qcom: wcnss: simplify allocation of req
  soc: qcom: pd-mapper: Add support for Eliza
  soc: qcom: aoss: compare against normalized cooling state
  soc: qcom: llcc: fix v1 SB syndrome register offset
  ...
parents e65f4718 33a20cda
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+3 −0
Original line number Diff line number Diff line
@@ -128,6 +128,9 @@ properties:
  "#address-cells":
    const: 1

  access-controllers:
    maxItems: 1

patternProperties:
  '^trig-conns@([0-9]+)$':
    type: object
+3 −0
Original line number Diff line number Diff line
@@ -78,6 +78,9 @@ properties:
        description: Output connection to CoreSight Trace bus
        $ref: /schemas/graph.yaml#/properties/port

  access-controllers:
    maxItems: 1

required:
  - compatible
  - reg
+3 −0
Original line number Diff line number Diff line
@@ -118,6 +118,9 @@ properties:
        description: Output connection from the ETM to CoreSight Trace bus.
        $ref: /schemas/graph.yaml#/properties/port

  access-controllers:
    maxItems: 1

required:
  - compatible
  - clocks
+3 −0
Original line number Diff line number Diff line
@@ -73,6 +73,9 @@ properties:
        description: Output connection to the CoreSight Trace bus.
        $ref: /schemas/graph.yaml#/properties/port

  access-controllers:
    maxItems: 1

required:
  - compatible
  - reg
+3 −0
Original line number Diff line number Diff line
@@ -128,6 +128,9 @@ properties:
      - const: tracedata
      - const: metadata

  access-controllers:
    maxItems: 1

required:
  - compatible
  - reg
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