Commit 3313c23f authored by Jessica Zhang's avatar Jessica Zhang Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Drop enable and frame_count parameters from dpu_hw_setup_misr() 



Drop the enable and frame_count parameters from dpu_hw_setup_misr() as they
are always set to the same values.

In addition, replace MISR_FRAME_COUNT_MASK with MISR_FRAME_COUNT as
frame_count is always set to the same value.

Fixes: 7b37523f ("drm/msm/dpu: Move MISR methods to dpu_hw_util")
Signed-off-by: default avatarJessica Zhang <quic_jesszhan@quicinc.com>
Reviewed-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/572009/
Link: https://lore.kernel.org/r/20231213-encoder-fixup-v4-2-6da6cd1bf118@quicinc.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
parent 980fffd0

drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c

+2 −2
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.

 * Copyright (C) 2013 Red Hat

 * Author: Rob Clark <robdclark@gmail.com>
@@ -114,7 +114,7 @@ static void dpu_crtc_setup_lm_misr(struct dpu_crtc_state *crtc_state) 
			continue;



		/* Calculate MISR over 1 frame */

		m->hw_lm->ops.setup_misr(m->hw_lm, true, 1);

		m->hw_lm->ops.setup_misr(m->hw_lm);

	}

}

drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

+2 −2
Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ 
/*

 * Copyright (C) 2013 Red Hat

 * Copyright (c) 2014-2018, 2020-2021 The Linux Foundation. All rights reserved.

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.

 *

 * Author: Rob Clark <robdclark@gmail.com>

 */
@@ -262,7 +262,7 @@ void dpu_encoder_setup_misr(const struct drm_encoder *drm_enc) 
		if (!phys->hw_intf || !phys->hw_intf->ops.setup_misr)

			continue;



		phys->hw_intf->ops.setup_misr(phys->hw_intf, true, 1);

		phys->hw_intf->ops.setup_misr(phys->hw_intf);

	}

}

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.c

+3 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

 */
@@ -320,9 +320,9 @@ static u32 dpu_hw_intf_get_line_count(struct dpu_hw_intf *intf) 
	return DPU_REG_READ(c, INTF_LINE_COUNT);

}



static void dpu_hw_intf_setup_misr(struct dpu_hw_intf *intf, bool enable, u32 frame_count)

static void dpu_hw_intf_setup_misr(struct dpu_hw_intf *intf)

{

	dpu_hw_setup_misr(&intf->hw, INTF_MISR_CTRL, enable, frame_count, 0x1);

	dpu_hw_setup_misr(&intf->hw, INTF_MISR_CTRL, 0x1);

}



static int dpu_hw_intf_collect_misr(struct dpu_hw_intf *intf, u32 *misr_value)

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h

+2 −2
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-only */

/*

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.

 */
@@ -95,7 +95,7 @@ struct dpu_hw_intf_ops { 


	void (*bind_pingpong_blk)(struct dpu_hw_intf *intf,

			const enum dpu_pingpong pp);

	void (*setup_misr)(struct dpu_hw_intf *intf, bool enable, u32 frame_count);

	void (*setup_misr)(struct dpu_hw_intf *intf);

	int (*collect_misr)(struct dpu_hw_intf *intf, u32 *misr_value);



	// Tearcheck on INTF since DPU 5.0.0

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c

+3 −3
Original line number Diff line number Diff line 
// SPDX-License-Identifier: GPL-2.0-only

/*

 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.

 * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.

 */
@@ -83,9 +83,9 @@ static void dpu_hw_lm_setup_border_color(struct dpu_hw_mixer *ctx, 
	}

}



static void dpu_hw_lm_setup_misr(struct dpu_hw_mixer *ctx, bool enable, u32 frame_count)

static void dpu_hw_lm_setup_misr(struct dpu_hw_mixer *ctx)

{

	dpu_hw_setup_misr(&ctx->hw, LM_MISR_CTRL, enable, frame_count, 0x0);

	dpu_hw_setup_misr(&ctx->hw, LM_MISR_CTRL, 0x0);

}



static int dpu_hw_lm_collect_misr(struct dpu_hw_mixer *ctx, u32 *misr_value)