Commit 33795986 authored by Sohil Mehta's avatar Sohil Mehta Committed by Ingo Molnar
Browse files

x86/acpi/cstate: Improve Intel Family model checks



Update the Intel Family checks to consistently use Family 15 instead of
Family 0xF. Also, get rid of one of last usages of x86_model by using
the new VFM checks.

Update the incorrect comment since the check has changed since the
initial commit:

  ee1ca48f ("ACPI: Disable ARB_DISABLE on platforms where it is not needed")

The two changes were:

 - 3e2ada58 ("ACPI: fix Compaq Evo N800c (Pentium 4m) boot hang regression")
   removed the P4 - Family 15.

 - 03a05ed1 ("ACPI: Use the ARB_DISABLE for the CPU which model id is less than 0x0f.")
   got rid of CORE_YONAH - Family 6, model E.

Signed-off-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Acked-by: default avatarRafael J. Wysocki <rafael.j.wysocki@intel.com>
Link: https://lore.kernel.org/r/20250219184133.816753-9-sohil.mehta@intel.com
parent eb1ac333
Loading
Loading
Loading
Loading
+3 −0
Original line number Diff line number Diff line
@@ -187,6 +187,9 @@
#define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */
#define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */

/* Notational marker denoting the last Family 6 model */
#define INTEL_FAM6_LAST			IFM(6, 0xFF)

/* Family 15 - NetBurst */
#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */
#define INTEL_P4_PRESCOTT		IFM(15, 0x03)
+4 −4
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@
#include <linux/sched.h>

#include <acpi/processor.h>
#include <asm/cpu_device_id.h>
#include <asm/cpuid.h>
#include <asm/mwait.h>
#include <asm/special_insns.h>
@@ -48,11 +49,10 @@ void acpi_processor_power_init_bm_check(struct acpi_processor_flags *flags,
	/*
	 * On all recent Intel platforms, ARB_DISABLE is a nop.
	 * So, set bm_control to zero to indicate that ARB_DISABLE
	 * is not required while entering C3 type state on
	 * P4, Core and beyond CPUs
	 * is not required while entering C3 type state.
	 */
	if (c->x86_vendor == X86_VENDOR_INTEL &&
	    (c->x86 > 0xf || (c->x86 == 6 && c->x86_model >= 0x0f)))
	    (c->x86 > 15 || (c->x86_vfm >= INTEL_CORE2_MEROM && c->x86_vfm <= INTEL_FAM6_LAST)))
		flags->bm_control = 0;

	if (c->x86_vendor == X86_VENDOR_CENTAUR) {