Commit eb1ac333 authored by Sohil Mehta's avatar Sohil Mehta Committed by Ingo Molnar
Browse files

x86/cpu/intel: Replace Family 5 model checks with VFM ones 



Introduce names for some Family 5 models and convert some of the checks
to be VFM based.

Also, to keep the file sorted by family, move Family 5 to the top of the
header file.

Signed-off-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
Acked-by: default avatarDave Hansen <dave.hansen@linux.intel.com>
Link: https://lore.kernel.org/r/20250219184133.816753-8-sohil.mehta@intel.com
parent fc866f24

arch/x86/include/asm/intel-family.h

+6 −3
Original line number Diff line number Diff line
@@ -45,6 +45,12 @@ 
/* Wildcard match so X86_MATCH_VFM(ANY) works */

#define INTEL_ANY			IFM(X86_FAMILY_ANY, X86_MODEL_ANY)



/* Family 5 */

#define INTEL_FAM5_START		IFM(5, 0x00) /* Notational marker, also P5 A-step */

#define INTEL_PENTIUM_75		IFM(5, 0x02) /* P54C */

#define INTEL_PENTIUM_MMX		IFM(5, 0x04) /* P55C */

#define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */



/* Family 6 */

#define INTEL_PENTIUM_PRO		IFM(6, 0x01)

#define INTEL_PENTIUM_II_KLAMATH	IFM(6, 0x03)
@@ -181,9 +187,6 @@ 
#define INTEL_XEON_PHI_KNL		IFM(6, 0x57) /* Knights Landing */

#define INTEL_XEON_PHI_KNM		IFM(6, 0x85) /* Knights Mill */



/* Family 5 */

#define INTEL_QUARK_X1000		IFM(5, 0x09) /* Quark X1000 SoC */



/* Family 15 - NetBurst */

#define INTEL_P4_WILLAMETTE		IFM(15, 0x01) /* Also Xeon Foster */

#define INTEL_P4_PRESCOTT		IFM(15, 0x03)

arch/x86/kernel/cpu/intel.c

+5 −6
Original line number Diff line number Diff line
@@ -358,9 +358,8 @@ static void intel_smp_check(struct cpuinfo_x86 *c) 
	/*

	 * Mask B, Pentium, but not Pentium MMX

	 */

	if (c->x86 == 5 &&

	    c->x86_stepping >= 1 && c->x86_stepping <= 4 &&

	    c->x86_model <= 3) {

	if (c->x86_vfm >= INTEL_FAM5_START && c->x86_vfm < INTEL_PENTIUM_MMX &&

	    c->x86_stepping >= 1 && c->x86_stepping <= 4) {

		/*

		 * Remember we have B step Pentia with bugs

		 */
@@ -387,7 +386,7 @@ static void intel_workarounds(struct cpuinfo_x86 *c) 
	 * The Quark is also family 5, but does not have the same bug.

	 */

	clear_cpu_bug(c, X86_BUG_F00F);

	if (c->x86 == 5 && c->x86_model < 9) {

	if (c->x86_vfm >= INTEL_FAM5_START && c->x86_vfm < INTEL_QUARK_X1000) {

		static int f00f_workaround_enabled;



		set_cpu_bug(c, X86_BUG_F00F);
@@ -435,7 +434,7 @@ static void intel_workarounds(struct cpuinfo_x86 *c) 
	 * integrated APIC (see 11AP erratum in "Pentium Processor

	 * Specification Update").

	 */

	if (boot_cpu_has(X86_FEATURE_APIC) && (c->x86<<8 | c->x86_model<<4) == 0x520 &&

	if (boot_cpu_has(X86_FEATURE_APIC) && c->x86_vfm == INTEL_PENTIUM_75 &&

	    (c->x86_stepping < 0x6 || c->x86_stepping == 0xb))

		set_cpu_bug(c, X86_BUG_11AP);
@@ -612,7 +611,7 @@ static unsigned int intel_size_cache(struct cpuinfo_x86 *c, unsigned int size) 
	 * Intel Quark SoC X1000 contains a 4-way set associative

	 * 16K cache with a 16 byte cache line and 256 lines per tag

	 */

	if ((c->x86 == 5) && (c->x86_model == 9))

	if (c->x86_vfm == INTEL_QUARK_X1000)

		size = 16;

	return size;

}