Commit 3d73327b authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/swsmu: add automatic parameter to set_soft_freq_range 



On chips that support it, you can specificy 0 and 0xffff for
min and max and the PMFW will use that to determine the optimal
min and max.  This enables optimal performance when the
user manually switches between performance levels using sysfs.
Previously we'd set soft min/max which could limit performance.

Reviewed-by: default avatarKenneth Feng <kenneth.feng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9f7e94af

drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c

+2 −1
Original line number Diff line number Diff line
@@ -140,7 +140,8 @@ int smu_set_soft_freq_range(struct smu_context *smu, 
		ret = smu->ppt_funcs->set_soft_freq_limited_range(smu,

								  clk_type,

								  min,

								  max);

								  max,

								  false);



	return ret;

}

drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h

+2 −1
Original line number Diff line number Diff line
@@ -1255,7 +1255,8 @@ struct pptable_funcs { 
	 * @set_soft_freq_limited_range: Set the soft frequency range of a clock

	 *                               domain in MHz.

	 */

	int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max);

	int (*set_soft_freq_limited_range)(struct smu_context *smu, enum smu_clk_type clk_type, uint32_t min, uint32_t max,

					   bool automatic);



	/**

	 * @set_power_source: Notify the SMU of the current power source.

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v11_0.h

+1 −1
Original line number Diff line number Diff line
@@ -255,7 +255,7 @@ int smu_v11_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c 
						 uint32_t *min, uint32_t *max);



int smu_v11_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,

			    uint32_t min, uint32_t max);

					  uint32_t min, uint32_t max, bool automatic);



int smu_v11_0_set_hard_freq_limited_range(struct smu_context *smu,

					  enum smu_clk_type clk_type,

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v12_0.h

+1 −1
Original line number Diff line number Diff line
@@ -56,7 +56,7 @@ int smu_v12_0_set_default_dpm_tables(struct smu_context *smu); 
int smu_v12_0_mode2_reset(struct smu_context *smu);



int smu_v12_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,

			    uint32_t min, uint32_t max);

					  uint32_t min, uint32_t max, bool automatic);



int smu_v12_0_set_driver_table_location(struct smu_context *smu);

drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h

+1 −1
Original line number Diff line number Diff line
@@ -219,7 +219,7 @@ int smu_v13_0_get_dpm_ultimate_freq(struct smu_context *smu, enum smu_clk_type c 
				    uint32_t *min, uint32_t *max);



int smu_v13_0_set_soft_freq_limited_range(struct smu_context *smu, enum smu_clk_type clk_type,

					  uint32_t min, uint32_t max);

					  uint32_t min, uint32_t max, bool automatic);



int smu_v13_0_set_hard_freq_limited_range(struct smu_context *smu,

					  enum smu_clk_type clk_type,