Commit 4241863a authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu/nbio: add functions to query ras specific interrupt status 



ras_controller_interrupt and err_event_interrupt are ras specific interrupts.
add functions to check their status and ack them if they are generated. both
funcitons should only be invoked in ISR when BIF ring is disabled or even not
initialized.

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bebc0762

drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h

+2 −0
Original line number Diff line number Diff line
@@ -77,6 +77,8 @@ struct amdgpu_nbio_funcs { 
	void (*init_registers)(struct amdgpu_device *adev);

	void (*detect_hw_virt)(struct amdgpu_device *adev);

	void (*remap_hdp_registers)(struct amdgpu_device *adev);

	void (*handle_ras_controller_intr_no_bifring)(struct amdgpu_device *adev);

	void (*handle_ras_err_event_athub_intr_no_bifring)(struct amdgpu_device *adev);

};



struct amdgpu_nbio {

drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c

+32 −0
Original line number Diff line number Diff line
@@ -315,6 +315,36 @@ static void nbio_v7_4_init_registers(struct amdgpu_device *adev) 
		WREG32_PCIE(smnPCIE_CI_CNTL, data);

}



static void nbio_v7_4_handle_ras_controller_intr_no_bifring(struct amdgpu_device *adev)

{

	uint32_t bif_doorbell_intr_cntl;



	bif_doorbell_intr_cntl = RREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL);

	if (REG_GET_FIELD(bif_doorbell_intr_cntl,

		BIF_DOORBELL_INT_CNTL, RAS_CNTLR_INTERRUPT_STATUS)) {

		/* driver has to clear the interrupt status when bif ring is disabled */

		bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl,

						BIF_DOORBELL_INT_CNTL,

						RAS_CNTLR_INTERRUPT_CLEAR, 1);

		WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);

	}

}



static void nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring(struct amdgpu_device *adev)

{

	uint32_t bif_doorbell_intr_cntl;



	bif_doorbell_intr_cntl = RREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL);

	if (REG_GET_FIELD(bif_doorbell_intr_cntl,

		BIF_DOORBELL_INT_CNTL, RAS_ATHUB_ERR_EVENT_INTERRUPT_STATUS)) {

		/* driver has to clear the interrupt status when bif ring is disabled */

		bif_doorbell_intr_cntl = REG_SET_FIELD(bif_doorbell_intr_cntl,

						BIF_DOORBELL_INT_CNTL,

						RAS_ATHUB_ERR_EVENT_INTERRUPT_CLEAR, 1);

		WREG32_SOC15(NBIO, 0, mmBIF_DOORBELL_INT_CNTL, bif_doorbell_intr_cntl);

	}

}



const struct amdgpu_nbio_funcs nbio_v7_4_funcs = {

	.get_hdp_flush_req_offset = nbio_v7_4_get_hdp_flush_req_offset,

	.get_hdp_flush_done_offset = nbio_v7_4_get_hdp_flush_done_offset,
@@ -336,4 +366,6 @@ const struct amdgpu_nbio_funcs nbio_v7_4_funcs = { 
	.init_registers = nbio_v7_4_init_registers,

	.detect_hw_virt = nbio_v7_4_detect_hw_virt,

	.remap_hdp_registers = nbio_v7_4_remap_hdp_registers,

	.handle_ras_controller_intr_no_bifring = nbio_v7_4_handle_ras_controller_intr_no_bifring,

	.handle_ras_err_event_athub_intr_no_bifring = nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring,

};