Commit 451bc9ae authored by Mingwei Zheng's avatar Mingwei Zheng Committed by Linus Walleij
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pinctrl: stm32: Add check for clk_enable()



Convert the driver to clk_bulk*() API.
Add check for the return value of clk_bulk_enable() to catch
the potential error.

Fixes: 05d8af44 ("pinctrl: stm32: Keep pinctrl block clock enabled when LEVEL IRQ requested")
Signed-off-by: default avatarMingwei Zheng <zmw12306@gmail.com>
Signed-off-by: default avatarJiasheng Jiang <jiashengjiangcool@gmail.com>
Reviewed-by: default avatarAntonio Borneo <antonio.borneo@foss.st.com>
Link: https://lore.kernel.org/20250106220659.2640365-1-zmw12306@gmail.com


Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 94467a22
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+38 −38
Original line number Diff line number Diff line
@@ -86,7 +86,6 @@ struct stm32_pinctrl_group {

struct stm32_gpio_bank {
	void __iomem *base;
	struct clk *clk;
	struct reset_control *rstc;
	spinlock_t lock;
	struct gpio_chip gpio_chip;
@@ -108,6 +107,7 @@ struct stm32_pinctrl {
	unsigned ngroups;
	const char **grp_names;
	struct stm32_gpio_bank *banks;
	struct clk_bulk_data *clks;
	unsigned nbanks;
	const struct stm32_pinctrl_match_data *match_data;
	struct irq_domain	*domain;
@@ -1308,12 +1308,6 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
	if (IS_ERR(bank->base))
		return PTR_ERR(bank->base);

	err = clk_prepare_enable(bank->clk);
	if (err) {
		dev_err(dev, "failed to prepare_enable clk (%d)\n", err);
		return err;
	}

	bank->gpio_chip = stm32_gpio_template;

	fwnode_property_read_string(fwnode, "st,bank-name", &bank->gpio_chip.label);
@@ -1360,26 +1354,20 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
							   bank->fwnode, &stm32_gpio_domain_ops,
							   bank);

		if (!bank->domain) {
			err = -ENODEV;
			goto err_clk;
		}
		if (!bank->domain)
			return -ENODEV;
	}

	names = devm_kcalloc(dev, npins, sizeof(char *), GFP_KERNEL);
	if (!names) {
		err = -ENOMEM;
		goto err_clk;
	}
	if (!names)
		return -ENOMEM;

	for (i = 0; i < npins; i++) {
		stm32_pin = stm32_pctrl_get_desc_pin_from_gpio(pctl, bank, i);
		if (stm32_pin && stm32_pin->pin.name) {
			names[i] = devm_kasprintf(dev, GFP_KERNEL, "%s", stm32_pin->pin.name);
			if (!names[i]) {
				err = -ENOMEM;
				goto err_clk;
			}
			if (!names[i])
				return -ENOMEM;
		} else {
			names[i] = NULL;
		}
@@ -1390,15 +1378,11 @@ static int stm32_gpiolib_register_bank(struct stm32_pinctrl *pctl, struct fwnode
	err = gpiochip_add_data(&bank->gpio_chip, bank);
	if (err) {
		dev_err(dev, "Failed to add gpiochip(%d)!\n", bank_nr);
		goto err_clk;
		return err;
	}

	dev_info(dev, "%s bank added\n", bank->gpio_chip.label);
	return 0;

err_clk:
	clk_disable_unprepare(bank->clk);
	return err;
}

static struct irq_domain *stm32_pctrl_get_irq_domain(struct platform_device *pdev)
@@ -1621,6 +1605,11 @@ int stm32_pctl_probe(struct platform_device *pdev)
	if (!pctl->banks)
		return -ENOMEM;

	pctl->clks = devm_kcalloc(dev, banks, sizeof(*pctl->clks),
				  GFP_KERNEL);
	if (!pctl->clks)
		return -ENOMEM;

	i = 0;
	for_each_gpiochip_node(dev, child) {
		struct stm32_gpio_bank *bank = &pctl->banks[i];
@@ -1632,24 +1621,27 @@ int stm32_pctl_probe(struct platform_device *pdev)
			return -EPROBE_DEFER;
		}

		bank->clk = of_clk_get_by_name(np, NULL);
		if (IS_ERR(bank->clk)) {
		pctl->clks[i].clk = of_clk_get_by_name(np, NULL);
		if (IS_ERR(pctl->clks[i].clk)) {
			fwnode_handle_put(child);
			return dev_err_probe(dev, PTR_ERR(bank->clk),
			return dev_err_probe(dev, PTR_ERR(pctl->clks[i].clk),
					     "failed to get clk\n");
		}
		pctl->clks[i].id = "pctl";
		i++;
	}

	ret = clk_bulk_prepare_enable(banks, pctl->clks);
	if (ret) {
		dev_err(dev, "failed to prepare_enable clk (%d)\n", ret);
		return ret;
	}

	for_each_gpiochip_node(dev, child) {
		ret = stm32_gpiolib_register_bank(pctl, child);
		if (ret) {
			fwnode_handle_put(child);

			for (i = 0; i < pctl->nbanks; i++)
				clk_disable_unprepare(pctl->banks[i].clk);

			return ret;
			goto err_register;
		}

		pctl->nbanks++;
@@ -1658,6 +1650,15 @@ int stm32_pctl_probe(struct platform_device *pdev)
	dev_info(dev, "Pinctrl STM32 initialized\n");

	return 0;
err_register:
	for (i = 0; i < pctl->nbanks; i++) {
		struct stm32_gpio_bank *bank = &pctl->banks[i];

		gpiochip_remove(&bank->gpio_chip);
	}

	clk_bulk_disable_unprepare(banks, pctl->clks);
	return ret;
}

static int __maybe_unused stm32_pinctrl_restore_gpio_regs(
@@ -1726,10 +1727,8 @@ static int __maybe_unused stm32_pinctrl_restore_gpio_regs(
int __maybe_unused stm32_pinctrl_suspend(struct device *dev)
{
	struct stm32_pinctrl *pctl = dev_get_drvdata(dev);
	int i;

	for (i = 0; i < pctl->nbanks; i++)
		clk_disable(pctl->banks[i].clk);
	clk_bulk_disable(pctl->nbanks, pctl->clks);

	return 0;
}
@@ -1738,10 +1737,11 @@ int __maybe_unused stm32_pinctrl_resume(struct device *dev)
{
	struct stm32_pinctrl *pctl = dev_get_drvdata(dev);
	struct stm32_pinctrl_group *g = pctl->groups;
	int i;
	int i, ret;

	for (i = 0; i < pctl->nbanks; i++)
		clk_enable(pctl->banks[i].clk);
	ret = clk_bulk_enable(pctl->nbanks, pctl->clks);
	if (ret)
		return ret;

	for (i = 0; i < pctl->ngroups; i++, g++)
		stm32_pinctrl_restore_gpio_regs(pctl, g->pin);