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drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS
According to i915 commit ad8ebf12 ("drm/i915/gt: Ensure memory quiesced before invalidation") quiescing of the memory traffic is required before invalidating the AuxCCS tables. Add an extra pipe control flush to achieve that. Signed-off-by:Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by:
Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://patch.msgid.link/20260324084018.20353-5-tvrtko.ursulin@igalia.com Signed-off-by:
Rodrigo Vivi <rodrigo.vivi@intel.com>