Unverified Commit 458b1e64 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Rodrigo Vivi
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drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS



According to i915 commit
ad8ebf12 ("drm/i915/gt: Ensure memory quiesced before invalidation")
quiescing of the memory traffic is required before invalidating the AuxCCS
tables.

Add an extra pipe control flush to achieve that.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@igalia.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patch.msgid.link/20260324084018.20353-5-tvrtko.ursulin@igalia.com


Signed-off-by: default avatarRodrigo Vivi <rodrigo.vivi@intel.com>
parent 88139af7
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+9 −1
Original line number Diff line number Diff line
@@ -409,6 +409,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
	struct xe_gt *gt = job->q->gt;
	struct xe_device *xe = gt_to_xe(gt);
	bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
	const bool aux_ccs = has_aux_ccs(xe);
	u32 mask_flags = 0;

	*head = lrc->ring.tail;
@@ -418,6 +419,13 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,

	i = emit_copy_timestamp(xe, lrc, dw, i);

	/*
	 * On AuxCCS platforms the invalidation of the Aux table requires
	 * quiescing the memory traffic beforehand.
	 */
	if (aux_ccs)
		i = emit_render_cache_flush(job, dw, i);

	dw[i++] = preparser_disable(true);
	if (lacks_render)
		mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS;
@@ -428,7 +436,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
	i = emit_pipe_invalidate(job->q, mask_flags, job->ring_ops_flush_tlb, dw, i);

	/* hsdes: 1809175790 */
	if (has_aux_ccs(xe))
	if (aux_ccs)
		i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i);

	dw[i++] = preparser_disable(false);