Commit 48f506ad authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc-fixes-6.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull SoC fixes from Arnd Bergmann:
 "Two more small fixes, correcting the cacheline size on Raspberry Pi 5
  and fixing a logic mistake in the microchip mpfs firmware driver"

* tag 'soc-fixes-6.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: dts: broadcom: Fix L2 linesize for Raspberry Pi 5
  firmware: microchip: fix UL_IAP lock check in mpfs_auto_update_state()
parents 4aa748dd a31ffd6e

arch/arm64/boot/dts/broadcom/bcm2712.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -67,7 +67,7 @@ cpu0: cpu@0 { 
			l2_cache_l0: l2-cache-l0 {

				compatible = "cache";

				cache-size = <0x80000>;

				cache-line-size = <128>;

				cache-line-size = <64>;

				cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set

				cache-level = <2>;

				cache-unified;
@@ -91,7 +91,7 @@ cpu1: cpu@1 { 
			l2_cache_l1: l2-cache-l1 {

				compatible = "cache";

				cache-size = <0x80000>;

				cache-line-size = <128>;

				cache-line-size = <64>;

				cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set

				cache-level = <2>;

				cache-unified;
@@ -115,7 +115,7 @@ cpu2: cpu@2 { 
			l2_cache_l2: l2-cache-l2 {

				compatible = "cache";

				cache-size = <0x80000>;

				cache-line-size = <128>;

				cache-line-size = <64>;

				cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set

				cache-level = <2>;

				cache-unified;
@@ -139,7 +139,7 @@ cpu3: cpu@3 { 
			l2_cache_l3: l2-cache-l3 {

				compatible = "cache";

				cache-size = <0x80000>;

				cache-line-size = <128>;

				cache-line-size = <64>;

				cache-sets = <1024>; //512KiB(size)/64(line-size)=8192ways/8-way set

				cache-level = <2>;

				cache-unified;

drivers/firmware/microchip/mpfs-auto-update.c

+2 −2
Original line number Diff line number Diff line
@@ -402,10 +402,10 @@ static int mpfs_auto_update_available(struct mpfs_auto_update_priv *priv) 
		return -EIO;



	/*

	 * Bit 5 of byte 1 is "UL_Auto Update" & if it is set, Auto Update is

	 * Bit 5 of byte 1 is "UL_IAP" & if it is set, Auto Update is

	 * not possible.

	 */

	if (response_msg[1] & AUTO_UPDATE_FEATURE_ENABLED)

	if ((((u8 *)response_msg)[1] & AUTO_UPDATE_FEATURE_ENABLED))

		return -EPERM;



	return 0;