Commit 4bbdb725 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'iommu-updates-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu 

Pull iommu updates from Joerg Roedel:
 "Core changes:
   - Make default-domains mandatory for all IOMMU drivers
   - Remove group refcounting
   - Add generic_single_device_group() helper and consolidate drivers
   - Cleanup map/unmap ops
   - Scaling improvements for the IOVA rcache depot
   - Convert dart & iommufd to the new domain_alloc_paging()

  ARM-SMMU:
   - Device-tree binding update:
       - Add qcom,sm7150-smmu-v2 for Adreno on SM7150 SoC
   - SMMUv2:
       - Support for Qualcomm SDM670 (MDSS) and SM7150 SoCs
   - SMMUv3:
       - Large refactoring of the context descriptor code to move the CD
         table into the master, paving the way for '->set_dev_pasid()'
         support on non-SVA domains
   - Minor cleanups to the SVA code

  Intel VT-d:
   - Enable debugfs to dump domain attached to a pasid
   - Remove an unnecessary inline function

  AMD IOMMU:
   - Initial patches for SVA support (not complete yet)

  S390 IOMMU:
   - DMA-API conversion and optimized IOTLB flushing

  And some smaller fixes and improvements"

* tag 'iommu-updates-v6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (102 commits)
  iommu/dart: Remove the force_bypass variable
  iommu/dart: Call apple_dart_finalize_domain() as part of alloc_paging()
  iommu/dart: Convert to domain_alloc_paging()
  iommu/dart: Move the blocked domain support to a global static
  iommu/dart: Use static global identity domains
  iommufd: Convert to alloc_domain_paging()
  iommu/vt-d: Use ops->blocked_domain
  iommu/vt-d: Update the definition of the blocking domain
  iommu: Move IOMMU_DOMAIN_BLOCKED global statics to ops->blocked_domain
  Revert "iommu/vt-d: Remove unused function"
  iommu/amd: Remove DMA_FQ type from domain allocation path
  iommu: change iommu_map_sgtable to return signed values
  iommu/virtio: Add __counted_by for struct viommu_request and use struct_size()
  iommu/vt-d: debugfs: Support dumping a specified page table
  iommu/vt-d: debugfs: Create/remove debugfs file per {device, pasid}
  iommu/vt-d: debugfs: Dump entry pointing to huge page
  iommu/vt-d: Remove unused function
  iommu/arm-smmu-v3-sva: Remove bond refcount
  iommu/arm-smmu-v3-sva: Remove unused iommu_sva handle
  iommu/arm-smmu-v3: Rename cdcfg to cd_table
  ...
parents 6bc986ab e8cca466

Documentation/admin-guide/kernel-parameters.txt

+5 −4
Original line number Diff line number Diff line
@@ -2227,7 +2227,7 @@ 
			  forcing Dual Address Cycle for PCI cards supporting

			  greater than 32-bit addressing.



	iommu.strict=	[ARM64, X86] Configure TLB invalidation behaviour

	iommu.strict=	[ARM64, X86, S390] Configure TLB invalidation behaviour

			Format: { "0" | "1" }

			0 - Lazy mode.

			  Request that DMA unmap operations use deferred
@@ -5694,9 +5694,10 @@ 
	s390_iommu=	[HW,S390]

			Set s390 IOTLB flushing mode

		strict

			With strict flushing every unmap operation will result in

			an IOTLB flush. Default is lazy flushing before reuse,

			which is faster.

			With strict flushing every unmap operation will result

			in an IOTLB flush. Default is lazy flushing before

			reuse, which is faster. Deprecated, equivalent to

			iommu.strict=1.



	s390_iommu_aperture=	[KNL,S390]

			Specifies the size of the per device DMA address space

Documentation/devicetree/bindings/iommu/arm,smmu.yaml

+2 −0
Original line number Diff line number Diff line
@@ -110,6 +110,7 @@ properties: 
              - qcom,sdm630-smmu-v2

              - qcom,sdm845-smmu-v2

              - qcom,sm6350-smmu-v2

              - qcom,sm7150-smmu-v2

          - const: qcom,adreno-smmu

          - const: qcom,smmu-v2

      - description: Qcom Adreno GPUs on Google Cheza platform
@@ -409,6 +410,7 @@ allOf: 
          contains:

            enum:

              - qcom,sm6350-smmu-v2

              - qcom,sm7150-smmu-v2

              - qcom,sm8150-smmu-500

              - qcom,sm8250-smmu-500

    then:

arch/arm/configs/multi_v7_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -1076,7 +1076,6 @@ CONFIG_QCOM_IPCC=y 
CONFIG_OMAP_IOMMU=y

CONFIG_OMAP_IOMMU_DEBUG=y

CONFIG_ROCKCHIP_IOMMU=y

CONFIG_TEGRA_IOMMU_GART=y

CONFIG_TEGRA_IOMMU_SMMU=y

CONFIG_EXYNOS_IOMMU=y

CONFIG_QCOM_IOMMU=y

arch/arm/configs/tegra_defconfig

+0 −1
Original line number Diff line number Diff line
@@ -292,7 +292,6 @@ CONFIG_CHROME_PLATFORMS=y 
CONFIG_CROS_EC=y

CONFIG_CROS_EC_I2C=m

CONFIG_CROS_EC_SPI=m

CONFIG_TEGRA_IOMMU_GART=y

CONFIG_TEGRA_IOMMU_SMMU=y

CONFIG_ARCH_TEGRA_2x_SOC=y

CONFIG_ARCH_TEGRA_3x_SOC=y

arch/powerpc/kernel/iommu.c

+24 −29
Original line number Diff line number Diff line
@@ -1280,13 +1280,19 @@ struct iommu_table_group_ops spapr_tce_table_group_ops = { 
/*

 * A simple iommu_ops to allow less cruft in generic VFIO code.

 */

static int spapr_tce_blocking_iommu_attach_dev(struct iommu_domain *dom,

static int

spapr_tce_platform_iommu_attach_dev(struct iommu_domain *platform_domain,

				    struct device *dev)

{

	struct iommu_domain *domain = iommu_get_domain_for_dev(dev);

	struct iommu_group *grp = iommu_group_get(dev);

	struct iommu_table_group *table_group;

	int ret = -EINVAL;



	/* At first attach the ownership is already set */

	if (!domain)

		return 0;



	if (!grp)

		return -ENODEV;
@@ -1297,17 +1303,22 @@ static int spapr_tce_blocking_iommu_attach_dev(struct iommu_domain *dom, 
	return ret;

}



static void spapr_tce_blocking_iommu_set_platform_dma(struct device *dev)

{

	struct iommu_group *grp = iommu_group_get(dev);

	struct iommu_table_group *table_group;

static const struct iommu_domain_ops spapr_tce_platform_domain_ops = {

	.attach_dev = spapr_tce_platform_iommu_attach_dev,

};



	table_group = iommu_group_get_iommudata(grp);

	table_group->ops->release_ownership(table_group);

}

static struct iommu_domain spapr_tce_platform_domain = {

	.type = IOMMU_DOMAIN_PLATFORM,

	.ops = &spapr_tce_platform_domain_ops,

};



static const struct iommu_domain_ops spapr_tce_blocking_domain_ops = {

	.attach_dev = spapr_tce_blocking_iommu_attach_dev,

static struct iommu_domain spapr_tce_blocked_domain = {

	.type = IOMMU_DOMAIN_BLOCKED,

	/*

	 * FIXME: SPAPR mixes blocked and platform behaviors, the blocked domain

	 * also sets the dma_api ops

	 */

	.ops = &spapr_tce_platform_domain_ops,

};



static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap)
@@ -1322,22 +1333,6 @@ static bool spapr_tce_iommu_capable(struct device *dev, enum iommu_cap cap) 
	return false;

}



static struct iommu_domain *spapr_tce_iommu_domain_alloc(unsigned int type)

{

	struct iommu_domain *dom;



	if (type != IOMMU_DOMAIN_BLOCKED)

		return NULL;



	dom = kzalloc(sizeof(*dom), GFP_KERNEL);

	if (!dom)

		return NULL;



	dom->ops = &spapr_tce_blocking_domain_ops;



	return dom;

}



static struct iommu_device *spapr_tce_iommu_probe_device(struct device *dev)

{

	struct pci_dev *pdev;
@@ -1371,12 +1366,12 @@ static struct iommu_group *spapr_tce_iommu_device_group(struct device *dev) 
}



static const struct iommu_ops spapr_tce_iommu_ops = {

	.default_domain = &spapr_tce_platform_domain,

	.blocked_domain = &spapr_tce_blocked_domain,

	.capable = spapr_tce_iommu_capable,

	.domain_alloc = spapr_tce_iommu_domain_alloc,

	.probe_device = spapr_tce_iommu_probe_device,

	.release_device = spapr_tce_iommu_release_device,

	.device_group = spapr_tce_iommu_device_group,

	.set_platform_dma_ops = spapr_tce_blocking_iommu_set_platform_dma,

};



static struct attribute *spapr_tce_iommu_attrs[] = {