Commit 4ce71cea authored by Abhinav Kumar's avatar Abhinav Kumar Committed by Dmitry Baryshkov
Browse files

drm/msm/dpu: Correct the SA8775P intr_underrun/intr_underrun index 



The intr_underrun and intr_vsync indices have been swapped, just simply
corrects them.

Cc: stable@vger.kernel.org
Fixes: b139c80d ("drm/msm/dpu: Add SA8775P support")
Signed-off-by: default avatarAbhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: default avatarYongxing Mou <yongxing.mou@oss.qualcomm.com>
Reviewed-by: default avatarKonrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/709209/
Link: https://lore.kernel.org/r/20260305-mdss_catalog-v5-2-06678ac39ac7@oss.qualcomm.com


Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
parent 7e459c41

drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_4_sa8775p.h

+2 −2
Original line number Diff line number Diff line
@@ -366,8 +366,8 @@ static const struct dpu_intf_cfg sa8775p_intf[] = { 
		.type = INTF_NONE,

		.controller_id = MSM_DP_CONTROLLER_0,	/* pair with intf_0 for DP MST */

		.prog_fetch_lines_worst_case = 24,

		.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17),

		.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),

		.intr_underrun = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 16),

		.intr_vsync = DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 17),

	}, {

		.name = "intf_7", .id = INTF_7,

		.base = 0x3b000, .len = 0x280,