Commit 4df9c0a2 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 

Pull new SoC support from Arnd Bergmann:
 "These five newly supported chips come with both devicetree
  descriptions and the changes to wire them up to the build system for
  easier bisection.

  The chips in question are:

   - Marvell PXA1908 was the first 64-bit mobile phone chip from Marvell
     in the product line that started with the Digital StrongARM SA1100
     based PDAs and continued with the Intel PXA2xx that dominated early
     smartphones. This one only made it only into a few products before
     the entire product line was cut in 2015.

   - The QiLai SoC is made by RISC-V core designer Andes Technologies
     and is in the 'Voyager' reference board in MicroATX form factor. It
     uses four in-order AX45MP cores, which is the midrange product from
     Andes.

   - CIX P1 is one of the few Arm chips designed for small workstations,
     and this one uses 12 Cortex-A720/A520 cores, making it also one of
     the only ARMv9.2 machines that one can but at the moment.

   - Axiado AX3000 is an embedded chip with relative small Cortex-A53
     CPU cores described as a "Trusted Control/Compute Unit" that can be
     used as a BMC in servers. In addition to the usual I/O, this one
     comes with 10GBit ethernet and and a 4TOPS NPU.

   - Sophgo SG2000 is an embedded chip that comes with both RISC-V and
     Arm cores that can run Linux. This was already supported for RISC-V
     but now it also works on Arm

  One more chip, the Black Sesame C1200 did not make it in tirm for the
  merge window"

* tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
  arm64: defconfig: Enable rudimentary Sophgo SG2000 support
  arm64: Add SOPHGO SOC family Kconfig support
  arm64: dts: sophgo: Add Duo Module 01 Evaluation Board
  arm64: dts: sophgo: Add Duo Module 01
  arm64: dts: sophgo: Add initial SG2000 SoC device tree
  MAINTAINERS: Add entry for Axiado
  arm64: defconfig: enable the Axiado family
  arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
  arm64: add Axiado SoC family
  dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
  dt-bindings: serial: cdns: add Axiado AX3000 UART controller
  dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
  dt-bindings: gpio: cdns: convert to YAML
  dt-bindings: arm: axiado: add AX3000 EVK compatible strings
  dt-bindings: vendor-prefixes: Add Axiado Corporation
  MAINTAINERS: Add CIX SoC maintainer entry
  arm64: dts: cix: Add sky1 base dts initial support
  dt-bindings: clock: cix: Add CIX sky1 scmi clock id
  arm64: defconfig: Enable CIX SoC
  mailbox: add CIX mailbox driver
  ...
parents 0f46f508 05a62303

Documentation/devicetree/bindings/arm/axiado.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/arm/axiado.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Axiado Platforms



maintainers:

  - Harshit Shah <hshah@axiado.com>



properties:

  $nodename:

    const: '/'

  compatible:

    oneOf:

      - description: AX3000 based boards

        items:

          - enum:

              - axiado,ax3000-evk       # Axiado AX3000 Evaluation Board

          - const: axiado,ax3000       # Axiado AX3000 SoC



additionalProperties: true

Documentation/devicetree/bindings/arm/cix.yaml

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause

%YAML 1.2

---

$id: http://devicetree.org/schemas/arm/cix.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: CIX platforms



maintainers:

  - Peter Chen <peter.chen@cixtech.com>

  - Fugang Duan <fugang.duan@cixtech.com>



properties:

  $nodename:

    const: '/'

  compatible:

    oneOf:



      - description: Radxa Orion O6

        items:

          - const: radxa,orion-o6

          - const: cix,sky1



additionalProperties: true



...

Documentation/devicetree/bindings/arm/mrvl/mrvl.yaml

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@@ -35,6 +35,11 @@ properties: 
          - enum:

              - dell,wyse-ariel

          - const: marvell,mmp3

      - description: PXA1908 based boards

        items:

          - enum:

              - samsung,coreprimevelte

          - const: marvell,pxa1908



additionalProperties: true

Documentation/devicetree/bindings/gpio/cdns,gpio.txt

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Cadence GPIO controller bindings



Required properties:

- compatible: should be "cdns,gpio-r1p02".

- reg: the register base address and size.

- #gpio-cells: should be 2.

	* first cell is the GPIO number.

	* second cell specifies the GPIO flags, as defined in

		<dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH

		and GPIO_ACTIVE_LOW flags are supported.

- gpio-controller: marks the device as a GPIO controller.

- clocks: should contain one entry referencing the peripheral clock driving

	the GPIO controller.



Optional properties:

- ngpios: integer number of gpio lines supported by this controller, up to 32.

- interrupts: interrupt specifier for the controllers interrupt.

- interrupt-controller: marks the device as an interrupt controller. When

	defined, interrupts, interrupt-parent and #interrupt-cells

	are required.

- interrupt-cells: should be 2.

	* first cell is the GPIO number you want to use as an IRQ source.

	* second cell specifies the IRQ type, as defined in

		<dt-bindings/interrupt-controller/irq.h>.

		Currently only level sensitive IRQs are supported.





Example:

	gpio0: gpio-controller@fd060000 {

		compatible = "cdns,gpio-r1p02";

		reg =<0xfd060000 0x1000>;



		clocks = <&gpio_clk>;



		interrupt-parent = <&gic>;

		interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;



		gpio-controller;

		#gpio-cells = <2>;



		interrupt-controller;

		#interrupt-cells = <2>;

	};

Documentation/devicetree/bindings/gpio/cdns,gpio.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/gpio/cdns,gpio.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Cadence GPIO Controller



maintainers:

  - Jan Kotas <jank@cadence.com>



properties:

  compatible:

    oneOf:

      - const: cdns,gpio-r1p02

      - items:

          - enum:

              - axiado,ax3000-gpio

          - const: cdns,gpio-r1p02



  reg:

    maxItems: 1



  clocks:

    maxItems: 1



  ngpios:

    minimum: 1

    maximum: 32



  gpio-controller: true



  "#gpio-cells":

    const: 2

    description: |

      - First cell is the GPIO line number.

      - Second cell is flags as defined in <dt-bindings/gpio/gpio.h>,

        only GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW supported.



  interrupt-controller: true



  "#interrupt-cells":

    const: 2

    description: |

      - First cell is the GPIO line number used as IRQ.

      - Second cell is the trigger type, as defined in

        <dt-bindings/interrupt-controller/irq.h>.



  interrupts:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - gpio-controller

  - "#gpio-cells"



if:

  required: [interrupt-controller]

then:

  required:

    - interrupts



additionalProperties: false



examples:

  - |

    #include <dt-bindings/interrupt-controller/arm-gic.h>

    #include <dt-bindings/interrupt-controller/irq.h>

    gpio0: gpio-controller@fd060000 {

        compatible = "cdns,gpio-r1p02";

        reg = <0xfd060000 0x1000>;

        clocks = <&gpio_clk>;



        interrupt-parent = <&gic>;

        interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;



        gpio-controller;

        #gpio-cells = <2>;



        interrupt-controller;

        #interrupt-cells = <2>;

    };