Commit 4ee38cd9 authored by Lorenzo Pieralisi's avatar Lorenzo Pieralisi Committed by Marc Zyngier
Browse files

arm64/sysreg: Add ICC_PPI_HMR<n>_EL1 



Add ICC_PPI_HMR<n>_EL1 registers sysreg description.

Signed-off-by: default avatarLorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: default avatarMarc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Acked-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20250703-gicv5-host-v7-5-12e71f1b3528@kernel.org


Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent fb0ad5ed

arch/arm64/tools/sysreg

+75 −0
Original line number Diff line number Diff line
@@ -3024,6 +3024,81 @@ Sysreg PMIAR_EL1 3 0 9 14 7 
Field	63:0	ADDRESS

EndSysreg



SysregFields	ICC_PPI_HMRx_EL1

Field	63	HM63

Field	62	HM62

Field	61	HM61

Field	60	HM60

Field	59	HM59

Field	58	HM58

Field	57	HM57

Field	56	HM56

Field	55	HM55

Field	54	HM54

Field	53	HM53

Field	52	HM52

Field	51	HM51

Field	50	HM50

Field	49	HM49

Field	48	HM48

Field	47	HM47

Field	46	HM46

Field	45	HM45

Field	44	HM44

Field	43	HM43

Field	42	HM42

Field	41	HM41

Field	40	HM40

Field	39	HM39

Field	38	HM38

Field	37	HM37

Field	36	HM36

Field	35	HM35

Field	34	HM34

Field	33	HM33

Field	32	HM32

Field	31	HM31

Field	30	HM30

Field	29	HM29

Field	28	HM28

Field	27	HM27

Field	26	HM26

Field	25	HM25

Field	24	HM24

Field	23	HM23

Field	22	HM22

Field	21	HM21

Field	20	HM20

Field	19	HM19

Field	18	HM18

Field	17	HM17

Field	16	HM16

Field	15	HM15

Field	14	HM14

Field	13	HM13

Field	12	HM12

Field	11	HM11

Field	10	HM10

Field	9	HM9

Field	8	HM8

Field	7	HM7

Field	6	HM6

Field	5	HM5

Field	4	HM4

Field	3	HM3

Field	2	HM2

Field	1	HM1

Field	0	HM0

EndSysregFields



Sysreg	ICC_PPI_HMR0_EL1	3	0	12	10	0

Fields ICC_PPI_HMRx_EL1

EndSysreg



Sysreg	ICC_PPI_HMR1_EL1	3	0	12	10	1

Fields ICC_PPI_HMRx_EL1

EndSysreg



Sysreg	ICC_ICSR_EL1	3	0	12	10	4

Res0	63:48

Field	47:32	IAFFID