Commit 519fb722 authored by Pu Lehui's avatar Pu Lehui Committed by Daniel Borkmann
Browse files

riscv, bpf: Optimize sign-extention mov insns with Zbb support 



Add 8-bit and 16-bit sign-extention wraper with Zbb support to optimize
sign-extension mov instructions.

Signed-off-by: default avatarPu Lehui <pulehui@huawei.com>
Signed-off-by: default avatarDaniel Borkmann <daniel@iogearbox.net>
Tested-by: default avatarBjörn Töpel <bjorn@rivosinc.com>
Acked-by: default avatarBjörn Töpel <bjorn@kernel.org>
Link: https://lore.kernel.org/bpf/20240115131235.2914289-6-pulehui@huaweicloud.com
parent 647b93f6

arch/riscv/net/bpf_jit.h

+22 −0
Original line number Diff line number Diff line
@@ -1119,6 +1119,28 @@ static inline void emit_subw(u8 rd, u8 rs1, u8 rs2, struct rv_jit_context *ctx) 
		emit(rv_subw(rd, rs1, rs2), ctx);

}



static inline void emit_sextb(u8 rd, u8 rs, struct rv_jit_context *ctx)

{

	if (rvzbb_enabled()) {

		emit(rvzbb_sextb(rd, rs), ctx);

		return;

	}



	emit_slli(rd, rs, 56, ctx);

	emit_srai(rd, rd, 56, ctx);

}



static inline void emit_sexth(u8 rd, u8 rs, struct rv_jit_context *ctx)

{

	if (rvzbb_enabled()) {

		emit(rvzbb_sexth(rd, rs), ctx);

		return;

	}



	emit_slli(rd, rs, 48, ctx);

	emit_srai(rd, rd, 48, ctx);

}



static inline void emit_sextw(u8 rd, u8 rs, struct rv_jit_context *ctx)

{

	emit_addiw(rd, rs, 0, ctx);

arch/riscv/net/bpf_jit_comp64.c

+3 −2
Original line number Diff line number Diff line
@@ -1074,9 +1074,10 @@ int bpf_jit_emit_insn(const struct bpf_insn *insn, struct rv_jit_context *ctx, 
			emit_mv(rd, rs, ctx);

			break;

		case 8:

			emit_sextb(rd, rs, ctx);

			break;

		case 16:

			emit_slli(RV_REG_T1, rs, 64 - insn->off, ctx);

			emit_srai(rd, RV_REG_T1, 64 - insn->off, ctx);

			emit_sexth(rd, rs, ctx);

			break;

		case 32:

			emit_sextw(rd, rs, ctx);