Commit 51dda148 authored by Ankit Nautiyal's avatar Ankit Nautiyal
Browse files

drm/i915/dp: Avoid left shift of DSC output bpp by 4 



To make way for fractional bpp support, avoid left shifting the
output_bpp by 4 in helper intel_dp_dsc_get_output_bpp.

Signed-off-by: default avatarAnkit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230817142459.89764-12-ankit.k.nautiyal@intel.com
parent 2f4761c6

drivers/gpu/drm/i915/display/intel_dp.c

+3 −7
Original line number Diff line number Diff line
@@ -814,11 +814,7 @@ u16 intel_dp_dsc_get_max_compressed_bpp(struct drm_i915_private *i915, 


	bits_per_pixel = intel_dp_dsc_nearest_valid_bpp(i915, bits_per_pixel, pipe_bpp);



	/*

	 * Compressed BPP in U6.4 format so multiply by 16, for Gen 11,

	 * fractional part is 0

	 */

	return bits_per_pixel << 4;

	return bits_per_pixel;

}



u8 intel_dp_dsc_get_slice_count(struct intel_dp *intel_dp,
@@ -1208,7 +1204,7 @@ intel_dp_mode_valid(struct drm_connector *_connector, 
								    mode->hdisplay,

								    bigjoiner,

								    output_format,

								    pipe_bpp, 64) >> 4;

								    pipe_bpp, 64);

			dsc_slice_count =

				intel_dp_dsc_get_slice_count(intel_dp,

							     target_clock,
@@ -1811,7 +1807,7 @@ int intel_dp_dsc_compute_config(struct intel_dp *intel_dp, 
							     pipe_config->pipe_bpp);



			pipe_config->dsc.compressed_bpp = min_t(u16,

								dsc_max_compressed_bpp >> 4,

								dsc_max_compressed_bpp,

								output_bpp);

		}

		pipe_config->dsc.slice_count = dsc_dp_slice_count;

drivers/gpu/drm/i915/display/intel_dp_mst.c

+1 −1
Original line number Diff line number Diff line
@@ -982,7 +982,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector *connector, 
								    mode->hdisplay,

								    bigjoiner,

								    INTEL_OUTPUT_FORMAT_RGB,

								    pipe_bpp, 64) >> 4;

								    pipe_bpp, 64);

			dsc_slice_count =

				intel_dp_dsc_get_slice_count(intel_dp,

							     target_clock,