Commit 5f9e29b9 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Geert Uytterhoeven
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clk: renesas: rzg2l-cpg: Reuse code in rzg2l_cpg_reset() 



Code in rzg2l_cpg_reset() is equivalent with the combined code of
rzg2l_cpg_assert() and rzg2l_cpg_deassert(). There is no need to have
different versions thus re-use rzg2l_cpg_assert() and rzg2l_cpg_deassert().

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231120070024.4079344-2-claudiu.beznea.uj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 5ab16198

drivers/clk/renesas/rzg2l-cpg.c

+15 −23
Original line number Diff line number Diff line
@@ -1410,29 +1410,6 @@ rzg2l_cpg_register_mod_clk(const struct rzg2l_mod_clk *mod, 


#define rcdev_to_priv(x)	container_of(x, struct rzg2l_cpg_priv, rcdev)



static int rzg2l_cpg_reset(struct reset_controller_dev *rcdev,

			   unsigned long id)

{

	struct rzg2l_cpg_priv *priv = rcdev_to_priv(rcdev);

	const struct rzg2l_cpg_info *info = priv->info;

	unsigned int reg = info->resets[id].off;

	u32 dis = BIT(info->resets[id].bit);

	u32 we = dis << 16;



	dev_dbg(rcdev->dev, "reset id:%ld offset:0x%x\n", id, CLK_RST_R(reg));



	/* Reset module */

	writel(we, priv->base + CLK_RST_R(reg));



	/* Wait for at least one cycle of the RCLK clock (@ ca. 32 kHz) */

	udelay(35);



	/* Release module from reset state */

	writel(we | dis, priv->base + CLK_RST_R(reg));



	return 0;

}



static int rzg2l_cpg_assert(struct reset_controller_dev *rcdev,

			    unsigned long id)

{
@@ -1463,6 +1440,21 @@ static int rzg2l_cpg_deassert(struct reset_controller_dev *rcdev, 
	return 0;

}



static int rzg2l_cpg_reset(struct reset_controller_dev *rcdev,

			   unsigned long id)

{

	int ret;



	ret = rzg2l_cpg_assert(rcdev, id);

	if (ret)

		return ret;



	/* Wait for at least one cycle of the RCLK clock (@ ca. 32 kHz) */

	udelay(35);



	return rzg2l_cpg_deassert(rcdev, id);

}



static int rzg2l_cpg_status(struct reset_controller_dev *rcdev,

			    unsigned long id)

{