Commit 618f9e12 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/dp: finish link training conversion to struct intel_display 



Convert the final stragglers to struct intel_display now that we have
platform identification via it too.

Reviewed-by: default avatarLuca Coelho <luciano.coelho@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/14a214fc358eafba8d57c25e0d26c8c35856dc89.1734083244.git.jani.nikula@intel.com


Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
parent 5d1bbfba

drivers/gpu/drm/i915/display/intel_dp_link_training.c

+3 −6
Original line number Diff line number Diff line
@@ -221,7 +221,6 @@ static int intel_dp_init_lttpr(struct intel_dp *intel_dp, const u8 dpcd[DP_RECEI 
int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_SIZE])

{

	struct intel_display *display = to_intel_display(intel_dp);

	struct drm_i915_private *i915 = to_i915(display->drm);



	if (intel_dp_is_edp(intel_dp))

		return 0;
@@ -230,7 +229,7 @@ int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_S 
	 * Detecting LTTPRs must be avoided on platforms with an AUX timeout

	 * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).

	 */

	if (DISPLAY_VER(display) >= 10 && !IS_GEMINILAKE(i915))

	if (DISPLAY_VER(display) >= 10 && !display->platform.geminilake)

		if (drm_dp_dpcd_probe(&intel_dp->aux,

				      DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV))

			return -EIO;
@@ -262,7 +261,6 @@ int intel_dp_read_dprx_caps(struct intel_dp *intel_dp, u8 dpcd[DP_RECEIVER_CAP_S 
int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp)

{

	struct intel_display *display = to_intel_display(intel_dp);

	struct drm_i915_private *i915 = to_i915(display->drm);

	int lttpr_count = 0;



	/*
@@ -270,7 +268,7 @@ int intel_dp_init_lttpr_and_dprx_caps(struct intel_dp *intel_dp) 
	 * period < 3.2ms. (see DP Standard v2.0, 2.11.2, 3.6.6.1).

	 */

	if (!intel_dp_is_edp(intel_dp) &&

	    (DISPLAY_VER(display) >= 10 && !IS_GEMINILAKE(i915))) {

	    (DISPLAY_VER(display) >= 10 && !display->platform.geminilake)) {

		u8 dpcd[DP_RECEIVER_CAP_SIZE];

		int err = intel_dp_read_dprx_caps(intel_dp, dpcd);
@@ -391,10 +389,9 @@ static bool has_per_lane_signal_levels(struct intel_dp *intel_dp, 
				       enum drm_dp_phy dp_phy)

{

	struct intel_display *display = to_intel_display(intel_dp);

	struct drm_i915_private *i915 = to_i915(display->drm);



	return !intel_dp_phy_is_downstream_of_source(intel_dp, dp_phy) ||

		DISPLAY_VER(display) >= 10 || IS_BROXTON(i915);

		DISPLAY_VER(display) >= 10 || display->platform.broxton;

}



/* 128b/132b */