Commit 682505a0 authored by Imre Deak's avatar Imre Deak Committed by Mika Kahola
Browse files

drm/i915/display: Add missing clock to C10 PHY state compute/HW readout 



Clock value is missing from C10 hw readout stage. Let's fix this.

Reviewed-by: default avatarLuca Coelho <luciano.coelho@intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Signed-off-by: default avatarMika Kahola <mika.kahola@intel.com>
Link: https://lore.kernel.org/r/20251015125446.3931198-8-mika.kahola@intel.com
parent 938a3b22

drivers/gpu/drm/i915/display/intel_cx0_phy.c

+5 −0
Original line number Diff line number Diff line
@@ -2103,6 +2103,9 @@ static int intel_c10pll_calc_state(struct intel_crtc_state *crtc_state, 
	return 0;

}



static int intel_c10pll_calc_port_clock(struct intel_encoder *encoder,

					const struct intel_c10pll_state *pll_state);



static void intel_c10pll_readout_hw_state(struct intel_encoder *encoder,

					  struct intel_c10pll_state *pll_state)

{
@@ -2127,6 +2130,8 @@ static void intel_c10pll_readout_hw_state(struct intel_encoder *encoder, 
	pll_state->tx = intel_cx0_read(encoder, lane, PHY_C10_VDR_TX(0));



	intel_cx0_phy_transaction_end(encoder, wakeref);



	pll_state->clock = intel_c10pll_calc_port_clock(encoder, pll_state);

}



static void intel_c10_pll_program(struct intel_display *display,

drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.c

+2 −0
Original line number Diff line number Diff line
@@ -332,6 +332,8 @@ void intel_snps_hdmi_pll_compute_c10pll(struct intel_c10pll_state *pll_state, u6 
			      c10_curve_1, c10_curve_2, prescaler_divider,

			      &pll_params);



	pll_state->clock = pixel_clock;



	pll_state->tx = 0x10;

	pll_state->cmn = 0x1;

	pll_state->pll[0] = REG_FIELD_PREP(C10_PLL0_DIV5CLK_EN, pll_params.mpll_div5_en) |