Commit 68e4ebd5 authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and... 

Merge branches 'clk-remove', 'clk-amlogic', 'clk-qcom', 'clk-parent' and 'clk-microchip' into clk-next

* clk-remove:
  clk: starfive: jh7110-vout: Convert to platform remove callback returning void
  clk: starfive: jh7110-isp: Convert to platform remove callback returning void
  clk: imx: imx8-acm: Convert to platform remove callback returning void

* clk-amlogic:
  clk: meson: Add missing clocks to axg_clk_regmaps

* clk-qcom: (62 commits)
  clk: qcom: gcc-ipq5018: fix register offset for GCC_UBI0_AXI_ARES reset
  clk: qcom: gcc-ipq5018: fix 'halt_reg' offset of 'gcc_pcie1_pipe_clk'
  clk: qcom: gcc-ipq5018: fix 'enable_reg' offset of 'gcc_gmac0_sys_clk'
  clk: qcom: camcc-x1e80100: Fix missing DT_IFACE enum in x1e80100 camcc
  clk: qcom: mmcc-msm8974: fix terminating of frequency table arrays
  clk: qcom: mmcc-apq8084: fix terminating of frequency table arrays
  clk: qcom: camcc-sc8280xp: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq9574: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq8074: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq6018: fix terminating of frequency table arrays
  clk: qcom: gcc-ipq5018: fix terminating of frequency table arrays
  clk: qcom: dispcc-sdm845: Adjust internal GDSC wait times
  dt-bindings: clk: qcom: drop the SC7180 Modem subsystem clock controller
  clk: qcom: drop the SC7180 Modem subsystem clock driver
  clk: qcom: Use qcom_branch_set_clk_en()
  clk: qcom: branch: Add a helper for setting the enable bit
  clk: qcom: dispcc-sm8250: Make clk_init_data and pll_vco const
  clk: qcom: gcc-sc8180x: Add missing UFS QREF clocks
  clk: qcom: gcc-msm8953: add more resets
  clk: qcom: videocc-*: switch to module_platform_driver
  ...

* clk-parent:
  clk: Fix clk_core_get NULL dereference

* clk-microchip:
  clk: microchip: mpfs: convert MSSPLL outputs to clk_divider
  clk: microchip: mpfs: add missing MSSPLL outputs
  clk: microchip: mpfs: setup for using other mss pll outputs
  clk: microchip: mpfs: split MSSPLL in two
  dt-bindings: can: mpfs: add missing required clock
  dt-bindings: clock: mpfs: add more MSSPLL output definitions
parents ee2d2a4e d963f257 151c31ee 27ec6a19 e97fe490 7a1b0e9d

Documentation/devicetree/bindings/clock/qcom,gpucc.yaml

+9 −0
Original line number Diff line number Diff line
@@ -53,6 +53,9 @@ properties: 
  power-domains:

    maxItems: 1



  vdd-gfx-supply:

    description: Regulator supply for the VDD_GFX pads



  '#clock-cells':

    const: 1
@@ -74,6 +77,12 @@ required: 
  - '#reset-cells'

  - '#power-domain-cells'



# Require that power-domains and vdd-gfx-supply are not both present

not:

  required:

    - power-domains

    - vdd-gfx-supply



additionalProperties: false



examples:

Documentation/devicetree/bindings/clock/qcom,q6sstopcc.yaml

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# 
title: Q6SSTOP clock Controller



maintainers:

  - Govind Singh <govinds@codeaurora.org>

  - Bjorn Andersson <andersson@kernel.org>



properties:

  compatible:

Documentation/devicetree/bindings/clock/qcom,sc7180-mss.yaml

deleted100644 → 0
+0 −61
Original line number Diff line number Diff line 
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/clock/qcom,sc7180-mss.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: Qualcomm Modem Clock Controller on SC7180



maintainers:

  - Taniya Das <quic_tdas@quicinc.com>



description: |

  Qualcomm modem clock control module provides the clocks on SC7180.



  See also:: include/dt-bindings/clock/qcom,mss-sc7180.h



properties:

  compatible:

    const: qcom,sc7180-mss



  clocks:

    items:

      - description: gcc_mss_mfab_axi clock from GCC

      - description: gcc_mss_nav_axi clock from GCC

      - description: gcc_mss_cfg_ahb clock from GCC



  clock-names:

    items:

      - const: gcc_mss_mfab_axis

      - const: gcc_mss_nav_axi

      - const: cfg_ahb



  '#clock-cells':

    const: 1



  reg:

    maxItems: 1



required:

  - compatible

  - reg

  - clocks

  - '#clock-cells'



additionalProperties: false



examples:

  - |

    #include <dt-bindings/clock/qcom,gcc-sc7180.h>

    clock-controller@41a8000 {

      compatible = "qcom,sc7180-mss";

      reg = <0x041a8000 0x8000>;

      clocks = <&gcc GCC_MSS_MFAB_AXIS_CLK>,

               <&gcc GCC_MSS_NAV_AXI_CLK>,

               <&gcc GCC_MSS_CFG_AHB_CLK>;

      clock-names = "gcc_mss_mfab_axis",

                    "gcc_mss_nav_axi",

                    "cfg_ahb";

      #clock-cells = <1>;

    };

...

Documentation/devicetree/bindings/clock/qcom,sm8450-camcc.yaml

+2 −0
Original line number Diff line number Diff line
@@ -17,6 +17,7 @@ description: | 
    include/dt-bindings/clock/qcom,sm8450-camcc.h

    include/dt-bindings/clock/qcom,sm8550-camcc.h

    include/dt-bindings/clock/qcom,sc8280xp-camcc.h

    include/dt-bindings/clock/qcom,x1e80100-camcc.h



allOf:

  - $ref: qcom,gcc.yaml#
@@ -27,6 +28,7 @@ properties: 
      - qcom,sc8280xp-camcc

      - qcom,sm8450-camcc

      - qcom,sm8550-camcc

      - qcom,x1e80100-camcc



  clocks:

    items:

Documentation/devicetree/bindings/clock/qcom,sm8450-gpucc.yaml

+2 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ description: | 
    include/dt-bindings/clock/qcom,sm8550-gpucc.h

    include/dt-bindings/reset/qcom,sm8450-gpucc.h

    include/dt-bindings/reset/qcom,sm8650-gpucc.h

    include/dt-bindings/reset/qcom,x1e80100-gpucc.h



properties:

  compatible:
@@ -25,6 +26,7 @@ properties: 
      - qcom,sm8450-gpucc

      - qcom,sm8550-gpucc

      - qcom,sm8650-gpucc

      - qcom,x1e80100-gpucc



  clocks:

    items: