Commit 69cc3764 authored by Sathishkumar S's avatar Sathishkumar S Committed by Alex Deucher
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drm/amdgpu/vcn: Register dump cleanup in VCN4_0_3 



Use generic vcn devcoredump helper functions for VCN4_0_3

Signed-off-by: default avatarSathishkumar S <sathishkumar.sundararaju@amd.com>
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 793b97c4

drivers/gpu/drm/amd/amdgpu/vcn_v4_0_3.c

+5 −74
Original line number Diff line number Diff line
@@ -160,8 +160,6 @@ static int vcn_v4_0_3_sw_init(struct amdgpu_ip_block *ip_block) 
	struct amdgpu_device *adev = ip_block->adev;

	struct amdgpu_ring *ring;

	int i, r, vcn_inst;

	uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_3);

	uint32_t *ptr;



	/* VCN DEC TRAP */

	r = amdgpu_irq_add_id(adev, SOC15_IH_CLIENTID_VCN,
@@ -231,14 +229,9 @@ static int vcn_v4_0_3_sw_init(struct amdgpu_ip_block *ip_block) 
		}

	}



	/* Allocate memory for VCN IP Dump buffer */

	ptr = kcalloc(adev->vcn.num_vcn_inst * reg_count, sizeof(uint32_t), GFP_KERNEL);

	if (!ptr) {

		DRM_ERROR("Failed to allocate memory for VCN IP Dump\n");

		adev->vcn.ip_dump = NULL;

	} else {

		adev->vcn.ip_dump = ptr;

	}

	r = amdgpu_vcn_reg_dump_init(adev, vcn_reg_list_4_0_3, ARRAY_SIZE(vcn_reg_list_4_0_3));

	if (r)

		return r;



	r = amdgpu_vcn_sysfs_reset_mask_init(adev);

	if (r)
@@ -1877,68 +1870,6 @@ static void vcn_v4_0_3_set_irq_funcs(struct amdgpu_device *adev) 
	adev->vcn.inst->ras_poison_irq.funcs = &vcn_v4_0_3_ras_irq_funcs;

}



static void vcn_v4_0_3_print_ip_state(struct amdgpu_ip_block *ip_block, struct drm_printer *p)

{

	struct amdgpu_device *adev = ip_block->adev;

	int i, j;

	uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_3);

	uint32_t inst_off, is_powered;



	if (!adev->vcn.ip_dump)

		return;



	drm_printf(p, "num_instances:%d\n", adev->vcn.num_vcn_inst);

	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		if (adev->vcn.harvest_config & (1 << i)) {

			drm_printf(p, "\nHarvested Instance:VCN%d Skipping dump\n", i);

			continue;

		}



		inst_off = i * reg_count;

		is_powered = (adev->vcn.ip_dump[inst_off] &

				UVD_POWER_STATUS__UVD_POWER_STATUS_MASK) != 1;



		if (is_powered) {

			drm_printf(p, "\nActive Instance:VCN%d\n", i);

			for (j = 0; j < reg_count; j++)

				drm_printf(p, "%-50s \t 0x%08x\n", vcn_reg_list_4_0_3[j].reg_name,

					   adev->vcn.ip_dump[inst_off + j]);

		} else {

			drm_printf(p, "\nInactive Instance:VCN%d\n", i);

		}

	}

}



static void vcn_v4_0_3_dump_ip_state(struct amdgpu_ip_block *ip_block)

{

	struct amdgpu_device *adev = ip_block->adev;

	int i, j;

	bool is_powered;

	uint32_t inst_off, inst_id;

	uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_3);



	if (!adev->vcn.ip_dump)

		return;



	for (i = 0; i < adev->vcn.num_vcn_inst; i++) {

		if (adev->vcn.harvest_config & (1 << i))

			continue;



		inst_id = GET_INST(VCN, i);

		inst_off = i * reg_count;

		/* mmUVD_POWER_STATUS is always readable and is first element of the array */

		adev->vcn.ip_dump[inst_off] = RREG32_SOC15(VCN, inst_id, regUVD_POWER_STATUS);

		is_powered = (adev->vcn.ip_dump[inst_off] &

				UVD_POWER_STATUS__UVD_POWER_STATUS_MASK) != 1;



		if (is_powered)

			for (j = 1; j < reg_count; j++)

				adev->vcn.ip_dump[inst_off + j] =

					RREG32(SOC15_REG_ENTRY_OFFSET_INST(vcn_reg_list_4_0_3[j],

									   inst_id));

	}

}



static const struct amd_ip_funcs vcn_v4_0_3_ip_funcs = {

	.name = "vcn_v4_0_3",

	.early_init = vcn_v4_0_3_early_init,
@@ -1952,8 +1883,8 @@ static const struct amd_ip_funcs vcn_v4_0_3_ip_funcs = { 
	.wait_for_idle = vcn_v4_0_3_wait_for_idle,

	.set_clockgating_state = vcn_v4_0_3_set_clockgating_state,

	.set_powergating_state = vcn_set_powergating_state,

	.dump_ip_state = vcn_v4_0_3_dump_ip_state,

	.print_ip_state = vcn_v4_0_3_print_ip_state,

	.dump_ip_state = amdgpu_vcn_dump_ip_state,

	.print_ip_state = amdgpu_vcn_print_ip_state,

};



const struct amdgpu_ip_block_version vcn_v4_0_3_ip_block = {