Commit 6b34e7ed authored by Dillon Varone's avatar Dillon Varone Committed by Alex Deucher
Browse files

drm/amd/display: Consider sink max slice width limitation for dsc 



[WHY&HOW]
The sink max slice width limitation should be considered for DSC, but
was removed in "refactor DSC cap calculations".
This patch adds it back and takes the valid minimum between the sink and
source.

Signed-off-by: default avatarDillon Varone <Dillon.Varone@amd.com>
Signed-off-by: default avatarAurabindo Pillai <aurabindo.pillai@amd.com>
Reviewed-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Tested-by: default avatarDan Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent bdbb6a14

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

+5 −0
Original line number Diff line number Diff line
@@ -1157,6 +1157,11 @@ static bool setup_dsc_config( 
	if (!is_dsc_possible)

		goto done;



	/* increase miniumum slice count to meet sink slice width limitations */

	min_slices_h = dc_fixpt_ceil(dc_fixpt_max(

			dc_fixpt_div_int(dc_fixpt_from_int(pic_width), dsc_common_caps.max_slice_width), // sink min

			dc_fixpt_from_int(min_slices_h))); // source min



	min_slices_h = fit_num_slices_up(dsc_common_caps.slice_caps, min_slices_h);



	/* increase minimum slice count to meet sink throughput limitations */