Unverified Commit 6e42454d authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge tag 'clk-imx-7.1' of... 

Merge tag 'clk-imx-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux into clk-imx

Pull i.MX clock driver updates from Abel Vesa:

 - Add optional ENET reference pad clock inputs for i.MX6Q/UL
 - Fix debug output in PLL14xx driver to use unsigned format specifier
 - Add 333.333 MHz and 477.4 MHz support to fracn-gppll for display use cases
 - Fix device node reference leaks in i.MX6 driver
 - Fix device node reference leak in of_assigned_ldb_sels()
 - Fix ACM clock flags on i.MX8 to prevent SAI sysclk failures
 - Move VF610_CLK_END define into the driver
 - Add VF610 Ethernet switch clock support
 - Correct CSI PHY parent clock selection on i.MX8MQ

* tag 'clk-imx-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/abelvesa/linux:
  clk: imx8mq: Correct the CSI PHY sels
  clk: vf610: Add support for the Ethernet switch clocks
  dt-bindings: clock: vf610: Add definitions for MTIP L2 switch
  dt-bindings: clock: vf610: Drop VF610_CLK_END define
  clk: vf610: Move VF610_CLK_END define to clk-vf610 driver
  clk: imx: imx8-acm: fix flags for acm clocks
  clk: imx: imx6q: Fix device node reference leak in of_assigned_ldb_sels()
  clk: imx: imx6q: Fix device node reference leak in pll6_bypassed()
  clk: imx: fracn-gppll: Add 477.4MHz support
  clk: imx: fracn-gppll: Add 333.333333 MHz support
  clk: imx: pll14xx: Use unsigned format specifier
  dt-bindings: clock: imx6q[ul]-clock: add optional clock enet[1]_ref_pad
parents c3692998 d16f57ca

Documentation/devicetree/bindings/clock/imx6q-clock.yaml

+4 −0
Original line number Diff line number Diff line
@@ -29,20 +29,24 @@ properties: 
    const: 1



  clocks:

    minItems: 5

    items:

      - description: 24m osc

      - description: 32k osc

      - description: ckih1 clock input

      - description: anaclk1 clock input

      - description: anaclk2 clock input

      - description: clock input from enet ref pad



  clock-names:

    minItems: 5

    items:

      - const: osc

      - const: ckil

      - const: ckih1

      - const: anaclk1

      - const: anaclk2

      - const: enet_ref_pad



  fsl,pmic-stby-poweroff:

    $ref: /schemas/types.yaml#/definitions/flag

Documentation/devicetree/bindings/clock/imx6ul-clock.yaml

+4 −0
Original line number Diff line number Diff line
@@ -29,18 +29,22 @@ properties: 
    const: 1



  clocks:

    minItems: 4

    items:

      - description: 32k osc

      - description: 24m osc

      - description: ipp_di0 clock input

      - description: ipp_di1 clock input

      - description: clock input from enet1 ref pad



  clock-names:

    minItems: 4

    items:

      - const: ckil

      - const: osc

      - const: ipp_di0

      - const: ipp_di1

      - const: enet1_ref_pad



required:

  - compatible

drivers/clk/imx/clk-fracn-gppll.c

+2 −0
Original line number Diff line number Diff line
@@ -85,9 +85,11 @@ static const struct imx_fracn_gppll_rate_table fracn_tbl[] = { 
	PLL_FRACN_GP(519750000U, 173, 25, 100, 1, 8),

	PLL_FRACN_GP(498000000U, 166, 0, 1, 0, 8),

	PLL_FRACN_GP(484000000U, 121, 0, 1, 0, 6),

	PLL_FRACN_GP(477400000U, 119, 35, 100, 0, 6),

	PLL_FRACN_GP(445333333U, 167, 0, 1, 0, 9),

	PLL_FRACN_GP(400000000U, 200, 0, 1, 0, 12),

	PLL_FRACN_GP(393216000U, 163, 84, 100, 0, 10),

	PLL_FRACN_GP(333333333U, 125, 0, 1, 1, 9),

	PLL_FRACN_GP(332600000U, 138, 584, 1000, 0, 10),

	PLL_FRACN_GP(300000000U, 150, 0, 1, 0, 12),

	PLL_FRACN_GP(241900000U, 201, 584, 1000, 0, 20),

drivers/clk/imx/clk-imx6q.c

+11 −1
Original line number Diff line number Diff line
@@ -188,9 +188,11 @@ static void of_assigned_ldb_sels(struct device_node *node, 
		}

		if (clkspec.np != node || clkspec.args[0] >= IMX6QDL_CLK_END) {

			pr_err("ccm: parent clock %d not in ccm\n", index);

			of_node_put(clkspec.np);

			return;

		}

		parent = clkspec.args[0];

		of_node_put(clkspec.np);



		rc = of_parse_phandle_with_args(node, "assigned-clocks",

				"#clock-cells", index, &clkspec);
@@ -198,9 +200,11 @@ static void of_assigned_ldb_sels(struct device_node *node, 
			return;

		if (clkspec.np != node || clkspec.args[0] >= IMX6QDL_CLK_END) {

			pr_err("ccm: child clock %d not in ccm\n", index);

			of_node_put(clkspec.np);

			return;

		}

		child = clkspec.args[0];

		of_node_put(clkspec.np);



		if (child != IMX6QDL_CLK_LDB_DI0_SEL &&

		    child != IMX6QDL_CLK_LDB_DI1_SEL)
@@ -238,9 +242,12 @@ static bool pll6_bypassed(struct device_node *node) 
			return false;



		if (clkspec.np == node &&

		    clkspec.args[0] == IMX6QDL_PLL6_BYPASS)

		    clkspec.args[0] == IMX6QDL_PLL6_BYPASS) {

			of_node_put(clkspec.np);

			break;

		}

		of_node_put(clkspec.np);

	}



	/* PLL6 bypass is not part of the assigned clock list */

	if (index == num_clocks)
@@ -249,6 +256,9 @@ static bool pll6_bypassed(struct device_node *node) 
	ret = of_parse_phandle_with_args(node, "assigned-clock-parents",

					 "#clock-cells", index, &clkspec);



	if (!ret)

		of_node_put(clkspec.np);



	if (clkspec.args[0] != IMX6QDL_CLK_PLL6)

		return true;

drivers/clk/imx/clk-imx8-acm.c

+2 −1
Original line number Diff line number Diff line
@@ -371,7 +371,8 @@ static int imx8_acm_clk_probe(struct platform_device *pdev) 
	for (i = 0; i < priv->soc_data->num_sels; i++) {

		hws[sels[i].clkid] = devm_clk_hw_register_mux_parent_data_table(dev,

										sels[i].name, sels[i].parents,

										sels[i].num_parents, 0,

										sels[i].num_parents,

										CLK_SET_RATE_NO_REPARENT,

										base + sels[i].reg,

										sels[i].shift, sels[i].width,

										0, NULL, NULL);