Commit d16f57ca authored by Sebastian Krzyszkowiak's avatar Sebastian Krzyszkowiak Committed by Abel Vesa
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clk: imx8mq: Correct the CSI PHY sels 



According to i.MX 8M Quad Reference Manual (Section 5.1.2 Table 5-1)
MIPI_CSI1_PHY_REF_CLK_ROOT and MIPI_CSI2_PHY_REF_CLK_ROOT have
SYSTEM_PLL2_DIV3 available as their second source, which corresponds
to sys2_pll_333m rather than sys2_pll_125m.

Fixes: b8052204 ("clk: imx: Add clock driver for i.MX8MQ CCM")
Signed-off-by: default avatarSebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Reviewed-by: default avatarPeng Fan <peng.fan@nxp.com>
Link: https://patch.msgid.link/20260128-imx8mq-csi-clk-v1-1-ac028ed26e8c@puri.sm


Signed-off-by: default avatarAbel Vesa <abel.vesa@oss.qualcomm.com>
parent d5dd8c52

drivers/clk/imx/clk-imx8mq.c

+2 −2
Original line number Diff line number Diff line
@@ -237,7 +237,7 @@ static const char * const imx8mq_dsi_esc_sels[] = {"osc_25m", "sys2_pll_100m", " 
static const char * const imx8mq_csi1_core_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",

					      "sys2_pll_1000m", "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };



static const char * const imx8mq_csi1_phy_sels[] = {"osc_25m", "sys2_pll_125m", "sys2_pll_100m", "sys1_pll_800m",

static const char * const imx8mq_csi1_phy_sels[] = {"osc_25m", "sys2_pll_333m", "sys2_pll_100m", "sys1_pll_800m",

					     "sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out", };



static const char * const imx8mq_csi1_esc_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m",
@@ -246,7 +246,7 @@ static const char * const imx8mq_csi1_esc_sels[] = {"osc_25m", "sys2_pll_100m", 
static const char * const imx8mq_csi2_core_sels[] = {"osc_25m", "sys1_pll_266m", "sys2_pll_250m", "sys1_pll_800m",

					      "sys2_pll_1000m", "sys3_pll_out", "audio_pll2_out", "video_pll1_out", };



static const char * const imx8mq_csi2_phy_sels[] = {"osc_25m", "sys2_pll_125m", "sys2_pll_100m", "sys1_pll_800m",

static const char * const imx8mq_csi2_phy_sels[] = {"osc_25m", "sys2_pll_333m", "sys2_pll_100m", "sys1_pll_800m",

					     "sys2_pll_1000m", "clk_ext2", "audio_pll2_out", "video_pll1_out", };



static const char * const imx8mq_csi2_esc_sels[] = {"osc_25m", "sys2_pll_100m", "sys1_pll_80m", "sys1_pll_800m",