Commit 72977f07 authored by Claudiu Beznea's avatar Claudiu Beznea Committed by Geert Uytterhoeven
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clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields 



Use FIELD_GET() for PLL register fields.  This is its purpose.

Signed-off-by: default avatarClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230912045157.177966-14-claudiu.beznea.uj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent becf4a77

drivers/clk/renesas/rzg2l-cpg.c

+5 −5
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ 
 * Copyright (C) 2015 Renesas Electronics Corp.

 */



#include <linux/bitfield.h>

#include <linux/clk.h>

#include <linux/clk-provider.h>

#include <linux/clk/renesas.h>
@@ -38,14 +39,13 @@ 
#define WARN_DEBUG(x)	do { } while (0)

#endif



#define DIV_RSMASK(v, s, m)	((v >> s) & m)

#define GET_SHIFT(val)		((val >> 12) & 0xff)

#define GET_WIDTH(val)		((val >> 8) & 0xf)



#define KDIV(val)		DIV_RSMASK(val, 16, 0xffff)

#define MDIV(val)		DIV_RSMASK(val, 6, 0x3ff)

#define PDIV(val)		DIV_RSMASK(val, 0, 0x3f)

#define SDIV(val)		DIV_RSMASK(val, 0, 0x7)

#define KDIV(val)		FIELD_GET(GENMASK(31, 16), val)

#define MDIV(val)		FIELD_GET(GENMASK(15, 6), val)

#define PDIV(val)		FIELD_GET(GENMASK(5, 0), val)

#define SDIV(val)		FIELD_GET(GENMASK(2, 0), val)



#define CLK_ON_R(reg)		(reg)

#define CLK_MON_R(reg)		(0x180 + (reg))