Merge tag 'asm-generic-alpha' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

virtual_root.force_probe

	Force the probing code to probe EISA slots even when it cannot find an

	EISA compliant mainboard (nothing appears on slot 0). Defaults to 0

	(don't force), and set to 1 (force probing) when either

	CONFIG_ALPHA_JENSEN or CONFIG_EISA_VLB_PRIMING are set.

	(don't force), and set to 1 (force probing) when

	CONFIG_EISA_VLB_PRIMING is set.

Random notes

============

	select ARCH_NO_SG_CHAIN

	select ARCH_USE_CMPXCHG_LOCKREF

	select DMA_OPS if PCI

	select FORCE_PCI if !ALPHA_JENSEN

	select FORCE_PCI

	select PCI_DOMAINS if PCI

	select PCI_SYSCALL if PCI

	select HAVE_ASM_MODVERSIONS

	  <http://www.alphalinux.org/>. In summary:

	  Alcor/Alpha-XLT     AS 600, AS 500, XL-300, XL-366

	  Alpha-XL            XL-233, XL-266

	  AlphaBook1          Alpha laptop

	  Avanti              AS 200, AS 205, AS 250, AS 255, AS 300, AS 400

	  Cabriolet           AlphaPC64, AlphaPCI64

	  DP264               DP264 / DS20 / ES40 / DS10 / DS10L

	  EB164               EB164 21164 evaluation board

	  EB64+               EB64+ 21064 evaluation board

	  EB66                EB66 21066 evaluation board

	  EB66+               EB66+ 21066 evaluation board

	  Jensen              DECpc 150, DEC 2000 models 300, 500

	  LX164               AlphaPC164-LX

	  Lynx                AS 2100A

	  Miata               Personal Workstation 433/500/600 a/au

	  Marvel              AlphaServer ES47 / ES80 / GS1280

	  Mikasa              AS 1000

	  Noname              AXPpci33, UDB (Multia)

	  Noritake            AS 1000A, AS 600A, AS 800

	  PC164               AlphaPC164

	  Rawhide             AS 1200, AS 4000, AS 4100

	  all the work required to support an external Bcache and to maintain

	  memory coherence when a PCI device DMAs into (or out of) memory.

config ALPHA_XL

	bool "Alpha-XL"

	help

	  XL-233 and XL-266-based Alpha systems.

config ALPHA_BOOK1

	bool "AlphaBook1"

	help

	  Dec AlphaBook1/Burns Alpha-based laptops.

config ALPHA_AVANTI_CH

	bool "Avanti"

config ALPHA_CABRIOLET

	bool "Cabriolet"

	help

	  Cabriolet AlphaPC64, AlphaPCI64 systems.  Derived from EB64+ but now

	  baby-AT with Flash boot ROM, no on-board SCSI or Ethernet. 3 ISA

	  slots, 4 PCI slots (one pair are on a shared slot), uses plug-in

	  Bcache SIMMs.  Requires power supply with 3.3V output.

config ALPHA_DP264

	bool "DP264"

	help

	  API Networks: 264DP, UP2000(+), CS20;

	  Compaq: DS10(E,L), XP900, XP1000, DS20(E), ES40.

config ALPHA_EB164

	bool "EB164"

	help

	  EB164 21164 evaluation board from DEC.  Uses 21164 and ALCOR.  Has

	  ISA and PCI expansion (3 ISA slots, 2 64-bit PCI slots (one is

	  shared with an ISA slot) and 2 32-bit PCI slots.  Uses plus-in

	  Bcache SIMMs. I/O sub-system provides SuperI/O (2S, 1P, FD), KBD,

	  MOUSE (PS2 style), RTC/NVRAM.  Boot ROM is Flash.  PC-AT-sized

	  motherboard.  Requires power supply with 3.3V output.

config ALPHA_EB64P_CH

	bool "EB64+"

config ALPHA_EB66

	bool "EB66"

	help

	  A Digital DS group board.  Uses 21066 or 21066A.  I/O sub-system is

	  identical to EB64+.  Baby PC-AT size.  Runs from standard PC power

	  supply.  The EB66 schematic was published as a marketing poster

	  advertising the 21066 as "the first microprocessor in the world with

	  embedded PCI".

config ALPHA_EB66P

	bool "EB66+"

	help

	  Later variant of the EB66 board.

config ALPHA_EIGER

	bool "Eiger"

	help

	  Apparently an obscure OEM single-board computer based on the

	  Typhoon/Tsunami chipset family. Information on it is scanty.

config ALPHA_JENSEN

	bool "Jensen"

	select HAVE_EISA

	help

	  DEC PC 150 AXP (aka Jensen): This is a very old Digital system - one

	  of the first-generation Alpha systems. A number of these systems

	  seem to be available on the second- hand market. The Jensen is a

	  floor-standing tower system which originally used a 150MHz 21064 It

	  used programmable logic to interface a 486 EISA I/O bridge to the

	  CPU.

config ALPHA_LX164

	bool "LX164"

	help

	  A technical overview of this board is available at

	  <http://www.unix-ag.org/Linux-Alpha/Architectures/LX164.html>.

config ALPHA_LYNX

	bool "Lynx"

	select HAVE_EISA

	help

	  AlphaServer 2100A-based systems.

config ALPHA_MARVEL

	bool "Marvel"

	help

	help

	  Alpha systems based on the AMD 751 & ALI 1543C chipsets.

config ALPHA_NONAME_CH

	bool "Noname"

config ALPHA_NORITAKE

	bool "Noritake"

	select HAVE_EISA

config ALPHA_PC164

	bool "PC164"

config ALPHA_P2K

	bool "Platform2000"

config ALPHA_RAWHIDE

	bool "Rawhide"

	select HAVE_EISA

	bool

	default y

config ALPHA_NONAME

	bool

	depends on ALPHA_BOOK1 || ALPHA_NONAME_CH

	default y

	help

	  The AXPpci33 (aka NoName), is based on the EB66 (includes the Multia

	  UDB).  This design was produced by Digital's Technical OEM (TOEM)

	  group. It uses the 21066 processor running at 166MHz or 233MHz. It

	  is a baby-AT size, and runs from a standard PC power supply. It has

	  5 ISA slots and 3 PCI slots (one pair are a shared slot). There are

	  2 versions, with either PS/2 or large DIN connectors for the

	  keyboard.

config ALPHA_EV4

	bool

	depends on ALPHA_JENSEN || (ALPHA_SABLE && !ALPHA_GAMMA) || ALPHA_LYNX || ALPHA_NORITAKE && !ALPHA_PRIMO || ALPHA_MIKASA && !ALPHA_PRIMO || ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P_CH || ALPHA_XL || ALPHA_NONAME || ALPHA_EB66 || ALPHA_EB66P || ALPHA_P2K

	default y if !ALPHA_LYNX

	default y if !ALPHA_EV5

config ALPHA_LCA

	bool

	depends on ALPHA_NONAME || ALPHA_EB66 || ALPHA_EB66P || ALPHA_P2K

	default y

config ALPHA_APECS

	bool

	depends on !ALPHA_PRIMO && (ALPHA_NORITAKE || ALPHA_MIKASA) || ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P_CH || ALPHA_XL

	default y

config ALPHA_EB64P

	bool

	depends on ALPHA_CABRIOLET || ALPHA_EB64P_CH

	default y

	help

	  Uses 21064 or 21064A and APECs.  Has ISA and PCI expansion (3 ISA,

	  2 PCI, one pair are on a shared slot). Supports 36-bit DRAM SIMs.

	  ISA bus generated by Intel SaturnI/O PCI-ISA bridge. On-board SCSI

	  (NCR 810 on PCI) Ethernet (Digital 21040), KBD, MOUSE (PS2 style),

	  SuperI/O (2S, 1P, FD), RTC/NVRAM. Boot ROM is EPROM.  PC-AT size.

	  Runs from standard PC power supply.

config ALPHA_EV5

	bool "EV5 CPU(s) (model 5/xxx)?" if ALPHA_LYNX

	default y if ALPHA_RX164 || ALPHA_RAWHIDE || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_SABLE && ALPHA_GAMMA || ALPHA_NORITAKE && ALPHA_PRIMO || ALPHA_MIKASA && ALPHA_PRIMO || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR

config ALPHA_CIA

	bool

	depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE && ALPHA_PRIMO || ALPHA_MIKASA && ALPHA_PRIMO || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR

	depends on ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR

	default y

config ALPHA_EV56

	bool "EV56 CPU (speed >= 366MHz)?" if ALPHA_ALCOR

	default y if ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA

config ALPHA_EV56

	prompt "EV56 CPU (speed >= 333MHz)?"

	depends on ALPHA_NORITAKE || ALPHA_PRIMO

config ALPHA_EV56

	prompt "EV56 CPU (speed >= 400MHz)?"

	depends on ALPHA_RAWHIDE

config ALPHA_PRIMO

	bool "EV5 CPU daughtercard (model 5/xxx)?"

	depends on ALPHA_NORITAKE || ALPHA_MIKASA

	help

	  Say Y if you have an AS 1000 5/xxx or an AS 1000A 5/xxx.

config ALPHA_GAMMA

	bool "EV5 CPU(s) (model 5/xxx)?" if ALPHA_SABLE

	depends on ALPHA_SABLE || ALPHA_LYNX

	default ALPHA_LYNX

	help

	  Say Y if you have an AS 2000 5/xxx or an AS 2100 5/xxx.

	bool

	default y if ALPHA_ALCOR || ALPHA_RX164 || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_RUFFIAN || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_NORITAKE || ALPHA_MIKASA || ALPHA_RAWHIDE || ALPHA_SABLE

config ALPHA_T2

	bool

	depends on ALPHA_SABLE || ALPHA_LYNX

	depends on ALPHA_SABLE

	default y

config ALPHA_PYXIS

	bool

	default y if !ALPHA_EV67

config ALPHA_AVANTI

	bool

	depends on ALPHA_XL || ALPHA_AVANTI_CH

	default y

	help

	  Avanti AS 200, AS 205, AS 250, AS 255, AS 300, and AS 400-based

	  Alphas. Info at

	  <http://www.unix-ag.org/Linux-Alpha/Architectures/Avanti.html>.

config ALPHA_BROKEN_IRQ_MASK

	bool

	depends on ALPHA_GENERIC || ALPHA_PC164

config ALPHA_SRM

	bool "Use SRM as bootloader" if ALPHA_CABRIOLET || ALPHA_AVANTI_CH || ALPHA_EB64P || ALPHA_PC164 || ALPHA_TAKARA || ALPHA_EB164 || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS || ALPHA_NONAME

	bool "Use SRM as bootloader" if ALPHA_PC164 || ALPHA_TAKARA || ALPHA_ALCOR || ALPHA_MIATA || ALPHA_LX164 || ALPHA_SX164 || ALPHA_NAUTILUS

	depends on TTY

	default y if ALPHA_JENSEN || ALPHA_MIKASA || ALPHA_SABLE || ALPHA_LYNX || ALPHA_NORITAKE || ALPHA_DP264 || ALPHA_RAWHIDE || ALPHA_EIGER || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL

	default y if ALPHA_MIKASA || ALPHA_SABLE || ALPHA_NORITAKE || ALPHA_DP264 || ALPHA_RAWHIDE || ALPHA_EIGER || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_SHARK || ALPHA_MARVEL

	help

	  There are two different types of booting firmware on Alphas: SRM,

	  which is command line driven, and ARC, which uses menus and arrow

config SMP

	bool "Symmetric multi-processing support"

	depends on ALPHA_SABLE || ALPHA_LYNX || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL

	depends on ALPHA_SABLE || ALPHA_RAWHIDE || ALPHA_DP264 || ALPHA_WILDFIRE || ALPHA_TITAN || ALPHA_GENERIC || ALPHA_SHARK || ALPHA_MARVEL

	help

	  This enables support for systems with more than one CPU. If you have

	  a system with only one CPU, say N. If you have a system with more

config ALPHA_WTINT

	bool "Use WTINT" if ALPHA_SRM || ALPHA_GENERIC

	default y if ALPHA_QEMU

	default n if ALPHA_EV5 || ALPHA_EV56 || (ALPHA_EV4 && !ALPHA_LCA)

	default n if ALPHA_EV56

	default n if !ALPHA_SRM && !ALPHA_GENERIC

	default y if SMP

	help

cflags-y	:= -pipe -mno-fp-regs -ffixed-8

cflags-y	+= $(call cc-option, -fno-jump-tables)

cpuflags-$(CONFIG_ALPHA_EV4)		:= -mcpu=ev4

cpuflags-$(CONFIG_ALPHA_EV5)		:= -mcpu=ev5

cpuflags-$(CONFIG_ALPHA_EV56)		:= -mcpu=ev56

cpuflags-$(CONFIG_ALPHA_POLARIS)	:= -mcpu=pca56

cpuflags-$(CONFIG_ALPHA_SX164)		:= -mcpu=pca56

cpuflags-$(CONFIG_ALPHA_EV6)		:= -mcpu=ev6

cpuflags-$(CONFIG_ALPHA_EV67)		:= -mcpu=ev67

# If GENERIC, make sure to turn off any instruction set extensions that

# the host compiler might have on by default.  Given that EV4 and EV5

# have the same instruction set, prefer EV5 because an EV5 schedule is

# more likely to keep an EV4 processor busy than vice-versa.

cpuflags-$(CONFIG_ALPHA_GENERIC)	:= -mcpu=ev5

# the host compiler might have on by default.

cpuflags-$(CONFIG_ALPHA_GENERIC)	:= -mcpu=ev56 -mtune=ev6

cflags-y				+= $(cpuflags-y)

/* SPDX-License-Identifier: GPL-2.0 */

#ifndef __ALPHA_LCA__H__

#define __ALPHA_LCA__H__

#include <asm/compiler.h>

#include <asm/mce.h>

/*

 * Low Cost Alpha (LCA) definitions (these apply to 21066 and 21068,

 * for example).

 *

 * This file is based on:

 *

 *	DECchip 21066 and DECchip 21068 Alpha AXP Microprocessors

 *	Hardware Reference Manual; Digital Equipment Corp.; May 1994;

 *	Maynard, MA; Order Number: EC-N2681-71.

 */

/*

 * NOTE: The LCA uses a Host Address Extension (HAE) register to access

 *	 PCI addresses that are beyond the first 27 bits of address

 *	 space.  Updating the HAE requires an external cycle (and

 *	 a memory barrier), which tends to be slow.  Instead of updating

 *	 it on each sparse memory access, we keep the current HAE value

 *	 cached in variable cache_hae.  Only if the cached HAE differs

 *	 from the desired HAE value do we actually updated HAE register.

 *	 The HAE register is preserved by the interrupt handler entry/exit

 *	 code, so this scheme works even in the presence of interrupts.

 *

 * Dense memory space doesn't require the HAE, but is restricted to

 * aligned 32 and 64 bit accesses.  Special Cycle and Interrupt

 * Acknowledge cycles may also require the use of the HAE.  The LCA

 * limits I/O address space to the bottom 24 bits of address space,

 * but this easily covers the 16 bit ISA I/O address space.

 */

/*

 * NOTE 2! The memory operations do not set any memory barriers, as

 * it's not needed for cases like a frame buffer that is essentially

 * memory-like.  You need to do them by hand if the operations depend

 * on ordering.

 *

 * Similarly, the port I/O operations do a "mb" only after a write

 * operation: if an mb is needed before (as in the case of doing

 * memory mapped I/O first, and then a port I/O operation to the same

 * device), it needs to be done by hand.

 *

 * After the above has bitten me 100 times, I'll give up and just do

 * the mb all the time, but right now I'm hoping this will work out.

 * Avoiding mb's may potentially be a noticeable speed improvement,

 * but I can't honestly say I've tested it.

 *

 * Handling interrupts that need to do mb's to synchronize to

 * non-interrupts is another fun race area.  Don't do it (because if

 * you do, I'll have to do *everything* with interrupts disabled,

 * ugh).

 */

/*

 * Memory Controller registers:

 */

#define LCA_MEM_BCR0		(IDENT_ADDR + 0x120000000UL)

#define LCA_MEM_BCR1		(IDENT_ADDR + 0x120000008UL)

#define LCA_MEM_BCR2		(IDENT_ADDR + 0x120000010UL)

#define LCA_MEM_BCR3		(IDENT_ADDR + 0x120000018UL)

#define LCA_MEM_BMR0		(IDENT_ADDR + 0x120000020UL)

#define LCA_MEM_BMR1		(IDENT_ADDR + 0x120000028UL)

#define LCA_MEM_BMR2		(IDENT_ADDR + 0x120000030UL)

#define LCA_MEM_BMR3		(IDENT_ADDR + 0x120000038UL)

#define LCA_MEM_BTR0		(IDENT_ADDR + 0x120000040UL)

#define LCA_MEM_BTR1		(IDENT_ADDR + 0x120000048UL)

#define LCA_MEM_BTR2		(IDENT_ADDR + 0x120000050UL)

#define LCA_MEM_BTR3		(IDENT_ADDR + 0x120000058UL)

#define LCA_MEM_GTR		(IDENT_ADDR + 0x120000060UL)

#define LCA_MEM_ESR		(IDENT_ADDR + 0x120000068UL)

#define LCA_MEM_EAR		(IDENT_ADDR + 0x120000070UL)

#define LCA_MEM_CAR		(IDENT_ADDR + 0x120000078UL)

#define LCA_MEM_VGR		(IDENT_ADDR + 0x120000080UL)

#define LCA_MEM_PLM		(IDENT_ADDR + 0x120000088UL)

#define LCA_MEM_FOR		(IDENT_ADDR + 0x120000090UL)

/*

 * I/O Controller registers:

 */

#define LCA_IOC_HAE		(IDENT_ADDR + 0x180000000UL)

#define LCA_IOC_CONF		(IDENT_ADDR + 0x180000020UL)

#define LCA_IOC_STAT0		(IDENT_ADDR + 0x180000040UL)

#define LCA_IOC_STAT1		(IDENT_ADDR + 0x180000060UL)

#define LCA_IOC_TBIA		(IDENT_ADDR + 0x180000080UL)

#define LCA_IOC_TB_ENA		(IDENT_ADDR + 0x1800000a0UL)

#define LCA_IOC_SFT_RST		(IDENT_ADDR + 0x1800000c0UL)

#define LCA_IOC_PAR_DIS		(IDENT_ADDR + 0x1800000e0UL)

#define LCA_IOC_W_BASE0		(IDENT_ADDR + 0x180000100UL)

#define LCA_IOC_W_BASE1		(IDENT_ADDR + 0x180000120UL)

#define LCA_IOC_W_MASK0		(IDENT_ADDR + 0x180000140UL)

#define LCA_IOC_W_MASK1		(IDENT_ADDR + 0x180000160UL)

#define LCA_IOC_T_BASE0		(IDENT_ADDR + 0x180000180UL)

#define LCA_IOC_T_BASE1		(IDENT_ADDR + 0x1800001a0UL)

#define LCA_IOC_TB_TAG0		(IDENT_ADDR + 0x188000000UL)

#define LCA_IOC_TB_TAG1		(IDENT_ADDR + 0x188000020UL)

#define LCA_IOC_TB_TAG2		(IDENT_ADDR + 0x188000040UL)

#define LCA_IOC_TB_TAG3		(IDENT_ADDR + 0x188000060UL)

#define LCA_IOC_TB_TAG4		(IDENT_ADDR + 0x188000070UL)

#define LCA_IOC_TB_TAG5		(IDENT_ADDR + 0x1880000a0UL)

#define LCA_IOC_TB_TAG6		(IDENT_ADDR + 0x1880000c0UL)

#define LCA_IOC_TB_TAG7		(IDENT_ADDR + 0x1880000e0UL)

/*

 * Memory spaces:

 */

#define LCA_IACK_SC		(IDENT_ADDR + 0x1a0000000UL)

#define LCA_CONF		(IDENT_ADDR + 0x1e0000000UL)

#define LCA_IO			(IDENT_ADDR + 0x1c0000000UL)

#define LCA_SPARSE_MEM		(IDENT_ADDR + 0x200000000UL)

#define LCA_DENSE_MEM		(IDENT_ADDR + 0x300000000UL)

/*

 * Bit definitions for I/O Controller status register 0:

 */

#define LCA_IOC_STAT0_CMD		0xf

#define LCA_IOC_STAT0_ERR		(1<<4)

#define LCA_IOC_STAT0_LOST		(1<<5)

#define LCA_IOC_STAT0_THIT		(1<<6)

#define LCA_IOC_STAT0_TREF		(1<<7)

#define LCA_IOC_STAT0_CODE_SHIFT	8

#define LCA_IOC_STAT0_CODE_MASK		0x7

#define LCA_IOC_STAT0_P_NBR_SHIFT	13

#define LCA_IOC_STAT0_P_NBR_MASK	0x7ffff

#define LCA_HAE_ADDRESS		LCA_IOC_HAE

/* LCA PMR Power Management register defines */

#define LCA_PMR_ADDR	(IDENT_ADDR + 0x120000098UL)

#define LCA_PMR_PDIV    0x7                     /* Primary clock divisor */

#define LCA_PMR_ODIV    0x38                    /* Override clock divisor */

#define LCA_PMR_INTO    0x40                    /* Interrupt override */

#define LCA_PMR_DMAO    0x80                    /* DMA override */

#define LCA_PMR_OCCEB   0xffff0000L             /* Override cycle counter - even bits */

#define LCA_PMR_OCCOB   0xffff000000000000L     /* Override cycle counter - even bits */

#define LCA_PMR_PRIMARY_MASK    0xfffffffffffffff8L

/* LCA PMR Macros */

#define LCA_READ_PMR        (*(volatile unsigned long *)LCA_PMR_ADDR)

#define LCA_WRITE_PMR(d)    (*((volatile unsigned long *)LCA_PMR_ADDR) = (d))

#define LCA_GET_PRIMARY(r)  ((r) & LCA_PMR_PDIV)

#define LCA_GET_OVERRIDE(r) (((r) >> 3) & LCA_PMR_PDIV)

#define LCA_SET_PRIMARY_CLOCK(r, c) ((r) = (((r) & LCA_PMR_PRIMARY_MASK)|(c)))

/* LCA PMR Divisor values */

#define LCA_PMR_DIV_1   0x0

#define LCA_PMR_DIV_1_5 0x1

#define LCA_PMR_DIV_2   0x2

#define LCA_PMR_DIV_4   0x3

#define LCA_PMR_DIV_8   0x4

#define LCA_PMR_DIV_16  0x5

#define LCA_PMR_DIV_MIN DIV_1

#define LCA_PMR_DIV_MAX DIV_16

/*

 * Data structure for handling LCA machine checks.  Correctable errors

 * result in a short logout frame, uncorrectable ones in a long one.

 */

struct el_lca_mcheck_short {

	struct el_common	h;		/* common logout header */

	unsigned long		esr;		/* error-status register */

	unsigned long		ear;		/* error-address register */

	unsigned long		dc_stat;	/* dcache status register */

	unsigned long		ioc_stat0;	/* I/O controller status register 0 */

	unsigned long		ioc_stat1;	/* I/O controller status register 1 */

};

struct el_lca_mcheck_long {

	struct el_common	h;		/* common logout header */

	unsigned long		pt[31];		/* PAL temps */

	unsigned long		exc_addr;	/* exception address */

	unsigned long		pad1[3];

	unsigned long		pal_base;	/* PALcode base address */

	unsigned long		hier;		/* hw interrupt enable */

	unsigned long		hirr;		/* hw interrupt request */

	unsigned long		mm_csr;		/* MMU control & status */

	unsigned long		dc_stat;	/* data cache status */

	unsigned long		dc_addr;	/* data cache addr register */

	unsigned long		abox_ctl;	/* address box control register */

	unsigned long		esr;		/* error status register */

	unsigned long		ear;		/* error address register */

	unsigned long		car;		/* cache control register */

	unsigned long		ioc_stat0;	/* I/O controller status register 0 */

	unsigned long		ioc_stat1;	/* I/O controller status register 1 */

	unsigned long		va;		/* virtual address register */

};

union el_lca {

	struct el_common *		c;

	struct el_lca_mcheck_long *	l;

	struct el_lca_mcheck_short *	s;

};

#ifdef __KERNEL__

#ifndef __EXTERN_INLINE

#define __EXTERN_INLINE extern inline

#define __IO_EXTERN_INLINE

#endif

/*

 * I/O functions:

 *

 * Unlike Jensen, the Noname machines have no concept of local

 * I/O---everything goes over the PCI bus.

 *

 * There is plenty room for optimization here.  In particular,

 * the Alpha's insb/insw/extb/extw should be useful in moving

 * data to/from the right byte-lanes.

 */

#define vip	volatile int __force *

#define vuip	volatile unsigned int __force *

#define vulp	volatile unsigned long __force *

#define LCA_SET_HAE						\

	do {							\

		if (addr >= (1UL << 24)) {			\

			unsigned long msb = addr & 0xf8000000;	\

			addr -= msb;				\

			set_hae(msb);				\

		}						\

	} while (0)

__EXTERN_INLINE u8 lca_ioread8(const void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	unsigned long result, base_and_type;

	if (addr >= LCA_DENSE_MEM) {

		addr -= LCA_DENSE_MEM;

		LCA_SET_HAE;

		base_and_type = LCA_SPARSE_MEM + 0x00;

	} else {

		addr -= LCA_IO;

		base_and_type = LCA_IO + 0x00;

	}

	result = *(vip) ((addr << 5) + base_and_type);

	return __kernel_extbl(result, addr & 3);

}

__EXTERN_INLINE void lca_iowrite8(u8 b, void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	unsigned long w, base_and_type;

	if (addr >= LCA_DENSE_MEM) {

		addr -= LCA_DENSE_MEM;

		LCA_SET_HAE;

		base_and_type = LCA_SPARSE_MEM + 0x00;

	} else {

		addr -= LCA_IO;

		base_and_type = LCA_IO + 0x00;

	}

	w = __kernel_insbl(b, addr & 3);

	*(vuip) ((addr << 5) + base_and_type) = w;

}

__EXTERN_INLINE u16 lca_ioread16(const void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	unsigned long result, base_and_type;

	if (addr >= LCA_DENSE_MEM) {

		addr -= LCA_DENSE_MEM;

		LCA_SET_HAE;

		base_and_type = LCA_SPARSE_MEM + 0x08;

	} else {

		addr -= LCA_IO;

		base_and_type = LCA_IO + 0x08;

	}

	result = *(vip) ((addr << 5) + base_and_type);

	return __kernel_extwl(result, addr & 3);

}

__EXTERN_INLINE void lca_iowrite16(u16 b, void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	unsigned long w, base_and_type;

	if (addr >= LCA_DENSE_MEM) {

		addr -= LCA_DENSE_MEM;

		LCA_SET_HAE;

		base_and_type = LCA_SPARSE_MEM + 0x08;

	} else {

		addr -= LCA_IO;

		base_and_type = LCA_IO + 0x08;

	}

	w = __kernel_inswl(b, addr & 3);

	*(vuip) ((addr << 5) + base_and_type) = w;

}

__EXTERN_INLINE u32 lca_ioread32(const void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	if (addr < LCA_DENSE_MEM)

		addr = ((addr - LCA_IO) << 5) + LCA_IO + 0x18;

	return *(vuip)addr;

}

__EXTERN_INLINE void lca_iowrite32(u32 b, void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	if (addr < LCA_DENSE_MEM)

		addr = ((addr - LCA_IO) << 5) + LCA_IO + 0x18;

	*(vuip)addr = b;

}

__EXTERN_INLINE u64 lca_ioread64(const void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	if (addr < LCA_DENSE_MEM)

		addr = ((addr - LCA_IO) << 5) + LCA_IO + 0x18;

	return *(vulp)addr;

}

__EXTERN_INLINE void lca_iowrite64(u64 b, void __iomem *xaddr)

{

	unsigned long addr = (unsigned long) xaddr;

	if (addr < LCA_DENSE_MEM)

		addr = ((addr - LCA_IO) << 5) + LCA_IO + 0x18;

	*(vulp)addr = b;

}

__EXTERN_INLINE void __iomem *lca_ioportmap(unsigned long addr)

{

	return (void __iomem *)(addr + LCA_IO);

}

__EXTERN_INLINE void __iomem *lca_ioremap(unsigned long addr,

					  unsigned long size)

{

	return (void __iomem *)(addr + LCA_DENSE_MEM);

}

__EXTERN_INLINE int lca_is_ioaddr(unsigned long addr)

{

	return addr >= IDENT_ADDR + 0x120000000UL;

}

__EXTERN_INLINE int lca_is_mmio(const volatile void __iomem *addr)

{

	return (unsigned long)addr >= LCA_DENSE_MEM;

}

#undef vip

#undef vuip

#undef vulp

#undef __IO_PREFIX

#define __IO_PREFIX		lca

#define lca_trivial_rw_bw	2

#define lca_trivial_rw_lq	1

#define lca_trivial_io_bw	0

#define lca_trivial_io_lq	0

#define lca_trivial_iounmap	1

#include <asm/io_trivial.h>

#ifdef __IO_EXTERN_INLINE

#undef __EXTERN_INLINE

#undef __IO_EXTERN_INLINE

#endif

#endif /* __KERNEL__ */

#endif /* __ALPHA_LCA__H__ */