Commit 736a2dcf authored by Borislav Petkov (AMD)'s avatar Borislav Petkov (AMD)
Browse files

x86/CPU/AMD: Simplify the spectral chicken fix 



msr_set_bit() takes a bit number to set but MSR_ZEN2_SPECTRAL_CHICKEN_BIT
is a bit mask. The usual pattern that code uses is a _BIT-named type
macro instead of a mask.

So convert it to a bit number to reflect that.

Also, msr_set_bit() already does the reading and checking whether the
bit needs to be set so use that instead of a local variable.

Fixup tabbing while at it.

No functional changes.

Signed-off-by: default avatarBorislav Petkov (AMD) <bp@alien8.de>
Reviewed-by: default avatarNikolay Borisov <nik.borisov@suse.com>
Link: https://patch.msgid.link/20251230110731.28108-1-bp@kernel.org
parent c957072d

arch/x86/include/asm/msr-index.h

+2 −2
Original line number Diff line number Diff line
@@ -795,7 +795,7 @@ 


/* Zen 2 */

#define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3

#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT   BIT_ULL(1)

#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT	1



/* Fam 17h MSRs */

#define MSR_F17H_IRPERF			0xc00000e9

arch/x86/kernel/cpu/amd.c

+2 −8
Original line number Diff line number Diff line
@@ -900,20 +900,14 @@ static void fix_erratum_1386(struct cpuinfo_x86 *c) 
void init_spectral_chicken(struct cpuinfo_x86 *c)

{

#ifdef CONFIG_MITIGATION_UNRET_ENTRY

	u64 value;



	/*

	 * On Zen2 we offer this chicken (bit) on the altar of Speculation.

	 *

	 * This suppresses speculation from the middle of a basic block, i.e. it

	 * suppresses non-branch predictions.

	 */

	if (!cpu_has(c, X86_FEATURE_HYPERVISOR)) {

		if (!rdmsrq_safe(MSR_ZEN2_SPECTRAL_CHICKEN, &value)) {

			value |= MSR_ZEN2_SPECTRAL_CHICKEN_BIT;

			wrmsrq_safe(MSR_ZEN2_SPECTRAL_CHICKEN, value);

		}

	}

	if (!cpu_has(c, X86_FEATURE_HYPERVISOR))

		msr_set_bit(MSR_ZEN2_SPECTRAL_CHICKEN, MSR_ZEN2_SPECTRAL_CHICKEN_BIT);

#endif

}

tools/arch/x86/include/asm/msr-index.h

+2 −2
Original line number Diff line number Diff line
@@ -771,7 +771,7 @@ 


/* Zen 2 */

#define MSR_ZEN2_SPECTRAL_CHICKEN	0xc00110e3

#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT   BIT_ULL(1)

#define MSR_ZEN2_SPECTRAL_CHICKEN_BIT	1



/* Fam 17h MSRs */

#define MSR_F17H_IRPERF			0xc00000e9